DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 618

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

19.8
When pins are set to on-board programming mode, program/erase/verify operations can be performed on the on-chip flash
memory. There are two on-board programming modes: boot mode and user program mode. The pin settings for transition
to each of these modes are shown in table 19-14. For a diagram of the transitions to the various flash memory modes, see
figure 19-8.
Table 19-14 Setting On-Board Programming Modes
Note: * Normally, user mode should be used. Set FWE to 1 to make a transition to user program mode before performing a
19.8.1
When boot mode is used, the flash memory programming control program must be prepared in the host beforehand. The
channel 1 SCI to be used is set to asynchronous mode.
When a reset-start is executed after the H8S/2357 MCU’s pins have been set to boot mode, the boot program built into the
MCU is started and the programming control program prepared in the host is serially transmitted to the MCU via the SCI.
In the MCU, the programming control program received via the SCI is written into the programming control program area
in on-chip RAM. After the transfer is completed, control branches to the start address of the programming control program
area and the programming control program execution state is entered (flash memory programming is performed).
The transferred programming control program must therefore include coding that follows the programming algorithm
given later.
The system configuration in boot mode is shown in figure 19-14, and the boot program mode execution procedure in
figure 19-15.
Rev.6.00 Oct.28.2004 page 588 of 1016
REJ09B0138-0600H
program/erase/verify operation.
On-Board Programming Modes
Boot Mode
Mode Name
Boot mode
User program mode*
Host
Figure 19-14 System Configuration in Boot Mode
CPU Operating Mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Advanced expanded mode with
on-chip ROM enabled
Advanced single-chip mode
Mode
Verify data transmission
Write data reception
RxD1
TxD1
FWE
1
1
SCI1
H8S/2357 chip
MD
0
1
2
Flash memory
On-chip RAM
MD
1
1
1
MD
0
1
0
1
0