DF2398F20V Renesas Electronics America, DF2398F20V Datasheet - Page 894

• Manufacturer Part Number: DF2398F20V
• Description: IC H8S/2300 MCU FLASH 128QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of DF2398F20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 87
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 128-QFP
• For Use With: YR0K42378FC000BA - KIT EVAL FOR H8S/2378
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

TSR5—Timer Status Register 5
TCNT5—Timer Counter 5
Rev.6.00 Oct.28.2004 page 864 of 1016
REJ09B0138-0600H
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
Bit
Initial value
Read/Write
Note: * This timer counter can be used as an up/down-counter only in phase counting
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
:
:
:
mode or when performing overflow/underflow counting on another channel. In
other cases it functions as an up-counter.
TCNT counts down
TCNT counts up
R/W
15
0
—
—
6
1
R/W
14
0
Underflow Flag
R/(W)*
TCFU
R/W
0
1
5
0
13
0
[Setting condition]
When the TCNT value underflows (changes from H'0000 to H'FFFF)
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
R/W
Overflow Flag
R/(W)*
12
TCFV
0
0
1
4
0
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
R/W
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
11
0
—
—
3
0
R/W
H'FEA5
H'FEA6
10
0
R/W
Up/down-counter*
—
—
9
0
2
0
R/W
Input Capture/Output Compare Flag B
8
0
R/(W)*
TGFB
0
1
1
0
R/W
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading TGFB = 1
Input Capture/Output Compare Flag A
7
0
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
0
1
R/(W)*
TGFA
R/W
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When DMAC is activated by TGIA interrupt while
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning
• When TCNT value is transferred to TGRA by
6
0
DISEL bit of MRB in DTC is 0
DTA bit of DMABCR in DMAC is 1
as output compare register
input capture signal while TGRA is functioning
as input capture register
R/W
5
0
R/W
4
0
R/W
3
0
TPU5
TPU5
R/W
2
0
R/W
1
0
R/W
0
0