AT89C5131A-S3SUL Atmel, AT89C5131A-S3SUL Datasheet - Page 158

MCU 8051 32K FLASH USB 52-PLCC

AT89C5131A-S3SUL

Manufacturer Part Number
AT89C5131A-S3SUL
Description
MCU 8051 32K FLASH USB 52-PLCC
Manufacturer
Atmel
Series
AT89C513xr
Datasheets

Specifications of AT89C5131A-S3SUL

Core Processor
C52X2
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
LED, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
1.25 KB
Interface Type
2-Wire, EUART, SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
34
Number Of Timers
3 bit
Operating Supply Voltage
3 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
AT89STK-05
Minimum Operating Temperature
- 40 C
For Use With
AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C5131A-S3SUL
Manufacturer:
Atmel
Quantity:
10 000
Reduced EMI Mode
158
AT89C5131A-L
The ALE signal is used to demultiplex address and data buses on port 0 when used with
external program or data memory. Nevertheless, during internal code execution, ALE
signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting
AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no
longer output but remains active during MOVX and MOVC instructions and external
fetches. During ALE disabling, ALE pin is weakly pulled high.
Table 112. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = 0X0X 1100b
Not bit addressable
Number
Bit
DPU
7
6
5
4
3
2
1
0
7
Mnemonic
EXTRAM
XRS1
XRS0
DPU
Bit
M0
AO
-
-
6
-
Description
Disable Weak Pull Up
Cleared to enabled weak pull up on standard Ports
Set to disable weak pull up on standard Ports
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Pulse length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock periods.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
ERAM Size
XRS1
0
0
1
1
EXTRAM bit
Cleared to access internal ERAM using MOVX at Ri at DPTR.
Set to access external memory.
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default).
Set , ALE is active only during a MOVX or MOVC instruction is used.
M0
5
XRS0 ERAM size
0
1
0
1
256 bytes
512 bytes
768 bytes
1024 bytes (default)
4
-
XRS1
3
XRS0
2
EXTRAM
1
4338F–USB–08/07
AO
0

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