AT89C5131A-S3SUL Atmel, AT89C5131A-S3SUL Datasheet - Page 56

• Manufacturer Part Number: AT89C5131A-S3SUL
• Description: MCU 8051 32K FLASH USB 52-PLCC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-S3SUL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: 2-Wire, EUART, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Figure 28. PCA Timer/Counter
56
AT89C5131A-L
F
F
Idle
CLK PERIPH
CLK PERIPH
T0 OVF
P1.2
/6
/2
Table 48. CMOD Register
CMOD - PCA Counter Mode Register (D9h)
Reset Value = 00XX X000b
Not bit addressable
Number
CIDL
CIDL
Bit
CF
7
7
6
5
4
3
2
1
0
WDTE
CR
Mnemonic
WDTE
WDTE
CPS1
CPS0
CIDL
ECF
Bit
6
-
-
-
CCF4 CCF3 CCF2 CCF1 CCF0
Description
Counter Idle Control
Cleared to program the PCA Counter to continue functioning during idle Mode.
Set to program PCA to be gated off during idle.
Watchdog Timer Enable
Cleared to disable Watchdog Timer function on PCA Module 4.
Set to enable Watchdog Timer function on PCA Module 4.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Count Pulse Select
CPS1CPS0
0
0
1
1
PCA Enable Counter Overflow Interrupt
Cleared to disable CF bit in CCON to inhibit an interrupt.
Set to enable CF bit in CCON to generate an interrupt.
5
-
0
1
0
1
CPS1 CPS0
Selected PCA input
Internal clock f
Internal clock f
Timer 0 Overflow
External clock at ECI/P1.2 pin (max rate = f
CH
16 Bit Up Counter
4
-
ECF
CLK PERIPH
CLK PERIPH
CL
3
-
CMOD
0xD9
CCON
0xD8
/6
/2
overflow
CPS1
2
To PCA
modules
CPS0
1
CLK PERIPH
It
4338F–USB–08/07
/ 4)
ECF
0