AT89C5131A-S3SUL Atmel, AT89C5131A-S3SUL Datasheet - Page 27

• Manufacturer Part Number: AT89C5131A-S3SUL
• Description: MCU 8051 32K FLASH USB 52-PLCC
• Manufacturer: Atmel
• Series: AT89C513xr

Specifications of AT89C5131A-S3SUL

• Core Processor: C52X2
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, SPI, UART/USART, USB
• Peripherals: LED, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: 2-Wire, EUART, SPI, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 3 bit
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: AT89STK-05
• Minimum Operating Temperature: - 40 C
• For Use With: AT89STK-10 - KIT EVAL APPL MASS STORAGEAT89STK-05 - KIT STARTER FOR AT89C5131
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Program/Code
Memory
External Code Memory
Access
Memory Interface
4338F–USB–08/07
The AT89C5131A-L implement 32 Kbytes of on-chip program/code memory. Figure 13
shows the split of internal and external program/code memory spaces depending on the
product.
The Flash memory increases EPROM and ROM functionality by in-circuit electrical era-
sure and programming. Thanks to the internal charge pump, the high voltage needed for
programming or erasing Flash cells is generated on-chip using the standard V
age. Thus, the Flash Memory can be programmed using only one voltage and allows In-
application Software Programming commonly known as IAP. Hardware programming
mode is also available using specific programming tool.
Figure 13. Program/Code Memory Organization
Note:
The external memory interface comprises the external bus (Port 0 and Port 2) as well as
the bus control signals (PSEN, and ALE).
Figure 14 shows the structure of the external address bus. P0 carries address A7:0
while P2 carries address A15:8. Data D7:0 is multiplexed with A7:0 on P0. Table 33
describes the external memory interface signals.
Figure 14. External Code Memory Interface Structure
If the program executes exclusively from on-chip code memory (not from external mem-
ory), beware of executing code from the upper byte of on-chip memory (7FFFh) and
thereby disrupting I/O Ports 0 and 2 due to external prefetch. Fetching code constant
from this location does not affect Ports 0 and 2.
AT89C5131
PSEN
ALE
P2
P0
FFFFh
7FFFh
8000h
0000h
AD7:0
A15:8
AT89C5131A-L
External Code
Latch
32 Kbytes
32 Kbytes
Flash
A7:0
A15:8
A7:0
D7:0
OE
EPROM
Flash
DD
volt-
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