HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 463

MPU 3V 16K PB-FREE 208-QFP

HD6417750SF200V

Manufacturer Part Number
HD6417750SF200V
Description
MPU 3V 16K PB-FREE 208-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750SF200V

Core Processor
SH-4
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 2.07 V
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417750SF200V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bits 13 to 11—Area 0 Burst ROM Control (A0BST2–A0BST0): These bits specify whether
burst ROM interface is used in area 0. When burst ROM interface is used, they also specify the
number of accesses in a burst. If area 0 is an MPX interface area, these bits are ignored.
Bit 13: A0BST2
0
1
Note:
*
Settable only for SH7750R.
Bit 12: A0BST1
0
1
0
1
Bit 11: A0BST0
0
1
0
1
0
1
0
1
Area 0 is accessed as SRAM interface
Area 0 is accessed as burst ROM
interface (4 consecutive accesses)
Can be used with 8-, 16-, 32-, or 64*-bit
bus width
Area 0 is accessed as burst ROM
interface (8 consecutive accesses)
Can only be used with 8-, 16-, or 32-bit
bus width
Area 0 is accessed as burst ROM
interface (16 consecutive accesses)
Can only be used with 8- or 16-bit bus
width. Do not specify for 32-bit bus width
Area 0 is accessed as burst ROM
interface (32 consecutive accesses)
Can only be used with 8-bit bus width
Reserved
Reserved
Reserved
Description
Rev.7.00 Oct. 10, 2008 Page 377 of 1074
Section 13 Bus State Controller (BSC)
REJ09B0366-0700
(Initial value)

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