HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 755

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit 5—Overrun Error (ORER): Indicates that an overrun error occurred during reception,
causing abnormal termination.
Bit 5: ORER
0
1
Notes: 1. The ORER flag is not affected and retains its previous state when the RE bit in
Bit 4—Framing Error (FER): Indicates that a framing error occurred during reception in
asynchronous mode, causing abnormal termination.
Bit 4: FER
0
1
Notes: 1. The FER flag is not affected and retains its previous state when the RE bit in SCSCR1
2. The receive data prior to the overrun error is retained in SCRDR1, and the data
2. In 2-stop-bit mode, only the first stop bit is checked for a value of 1; the second stop bit
SCSCR1 is cleared to 0.
received subsequently is lost. Serial reception cannot be continued while the ORER flag
is set to 1. In synchronous mode, serial transmission cannot be continued either.
is cleared to 0.
is not checked. If a framing error occurs, the receive data is transferred to SCRDR1 but
the RDRF flag is not set. Serial reception cannot be continued while the FER flag is set
to 1.
Description
Reception in progress, or reception has ended normally *
[Clearing conditions]
•
•
An overrun error occurred during reception *
[Setting condition]
When the next serial reception is completed while RDRF = 1
Description
Reception in progress, or reception has ended normally *
[Clearing conditions]
•
•
A framing error occurred during reception
[Setting condition]
When the SCI checks whether the stop bit at the end of the receive data is 1
when reception ends, and the stop bit is 0 *
Power-on reset, manual reset, standby mode, or module standby
When 0 is written to ORER after reading ORER = 1
Power-on reset, manual reset, standby mode, or module standby
When 0 is written to FER after reading FER = 1
Section 15 Serial Communication Interface (SCI)
Rev.7.00 Oct. 10, 2008 Page 669 of 1074
2
2
1
1
REJ09B0366-0700
(Initial value)
(Initial value)