HD6417750SF200V Renesas Electronics America, HD6417750SF200V Datasheet - Page 885

• Manufacturer Part Number: HD6417750SF200V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF200V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 2.07 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Retransfer Operation when SCI is in Transmit Mode: Figure 17.12 illustrates the retransfer
operation when the SCI is in transmit mode.
1. If an error signal is sent back from the receiving side after transmission of one frame is
2. The TEND bit in SCSSR1 is not set for a frame for which an error signal indicating an error is
3. If an error signal is not sent back from the receiving side, the FER/ERS bit in SCSSR1 is not
4. If an error signal is not sent back from the receiving side, transmission of one frame, including
PER
RDRF
completed, the FER/ERS bit in SCSSR1 is set to 1. If the RIE bit in SCSCR1 is enabled at this
time, an ERI interrupt request is generated. The FER/ERS bit in SCSSR1 should be cleared to
0 before the next parity bit is sampled.
received.
set.
a retransfer, is judged to have been completed, and the TEND bit in SCSSR1 is set to 1. If the
TIE bit in SCSCR1 is enabled at this time, a TXI interrupt request is generated.
FER/ERS
TEND
Ds
Ds
Transfer from SCTDR1
to SCTSR1
TDRE
D0
D0
D1 D2 D3 D4 D5 D6 D7 Dp
D1 D2 D3 D4 D5 D6 D7 Dp
nth transfer frame
nth transfer frame
Figure 17.12 Retransfer Operation in SCI Transmit Mode
Figure 17.11 Retransfer Operation in SCI Receive Mode
DE
DE
2
1
1
2
Ds
Ds
Transfer from SCTDR1
to SCTSR1
D0 D1
D0 D1
Retransferred frame
D2
D2
Retransferred frame
D3
D3
D4
D4
Rev.7.00 Oct. 10, 2008 Page 799 of 1074
D5 D6 D7 Dp
D5 D6 D7 Dp
Section 17 Smart Card Interface
3
(DE)
(DE)
4
5
4
3
Ds
Transfer from SCTDR1
to SCTSR1
Ds
Transfer frame n+1
Transfer frame n+1
D0
D0
REJ09B0366-0700
D1
D1
D2
D2
D3
D3
D4
D4