UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 292

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

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(a) Start timing in interval timer mode and up and down count mode
Note These operation modes are used with the inverter control function. For the inverter control function,
Caution In the first cycle operation of count clock after writing TSn, an error at a maximum of one
<1> Operation is enabled (TEn = 1) by writing 1 to the TSn bit.
<2> The write data to TSn is held until count clock generation.
<3> TCRn holds the initial value until count clock generation.
<4> On generation of count clock, the value of TDRn is loaded to TCRn and count starts.
Start trigger detection signal
refer to CHAPTER 7 INVERTER CONTROL FUNCTIONS.
Figure 6-11. Start Timing (In Interval Timer Mode and Up and Down Count Mode
clock is generated since count start delays until count clock has been generated. When the
information on count start timing is necessary, an interrupt can be generated at count start
by setting MDn0 = 1.
TSn (write) hold signal
Count clock
TSn (write)
INTTMn
TCRn
TEn
f
CLK
CHAPTER 6 TIMER ARRAY UNIT TAUS
<1>
User’s Manual U19678EJ1V1UD
<2>
Initial value
<3>
Note
TDRn value
When MDn0 = 1 is set
<4>
Note
)