UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 353
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UPD78F1211GB-GAF-AX
Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet
1.UPD78F1201MC-CAB-AX.pdf
(1067 pages)
Specifications of UPD78F1211GB-GAF-AX
Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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TAUS
default
setting
Channel
default
setting
Remark
Sets slave channel.
Sets the TAU0EN bit of the PER2 register to 1.
Sets the TPS0 register.
Sets the TMRn and TMRm registers of two channels to
be used (determines operation mode of channels).
An interval (period) value is set to the TDRn register of
the master channel, and a duty factor is set to the TDRm
register of the slave channel.
n = 00, 02, 04, 06, 08, 10 (78K0R/IB3: n = 02, 04, 06 and 10)
m = n + 1
Determines the clock frequencies of CK00 and CK01
for channels 0 to 7, and those of CK02 and CK03 for
channels 8 to 11.
The TOMm bit of the TOM0 register is set to 1
(slave channel output mode).
Sets the TOLm bit.
Sets the TOm bit and determines default level of the
TOm output.
Sets TOEm to 1 and enables operation of TOm.
Clears the port register and port mode register to 0.
Figure 6-65. Operation Procedure When PWM Function Is Used (1/2)
Software Operation
CHAPTER 6 TIMER ARRAY UNIT TAUS
User’s Manual U19678EJ1V1UD
Power-off status
Power-on status. Each channel stops operating.
Channel stops operating.
(Clock is supplied and some power is consumed.)
The TOm pin goes into Hi-Z output state.
The TOm default setting level is output when the port
mode register is in output mode and the port register is 0.
TOm does not change because channel stops operating.
The TOm pin outputs the TOm set level.
(Clock supply is stopped and writing to each register is
disabled.)
(Clock supply is started and writing to each register is
enabled.)
Hardware Status
351
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