UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 620

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

618
Address: F0118H, F0119H (SCR00) to F011EH, F011FH (SCR03)
Remark n: Channel number (n = 0 to 3),
Symbol
SCR0n
Note
Caution Be sure to clear bits 3, 6, and 11 to “0”. Be sure to set bit 2 to “1”.
Figure 13-7. Format of Serial Communication Operation Setting Register 0n (SCR0n) (1/2)
p: CSI number (p = 10 (78K0R/IB3 and 38-pin products of 78K0R/IC3), p = 00, 01 and 10 (44-pin and
Be sure to set DAP0n, CKP0n = 0, 0 in the UART mode and simplified I
Set EOC0n = 0 in the CSI mode, simplified I
Set EOC0n = 1 during UART reception.
EOC
TXE
DAP
TXE
When using CSI01 not with EOC01 = 0, error interrupt INTSRE0 may be generated.
0n
0n
0n
15
0n
0
0
1
1
0
0
1
1
0
1
48-pin products of 78K0R/IC3, 78K0R/ID3, and 78K0R/IE3 only) )
Masks error interrupt INTSREx (INTSRx is not masked).
Enables generation of error interrupt INTSREx (INTSRx is masked if an error occurs).
RXE
CKP
RXE
0n
0n
14
0n
0
1
0
1
0
1
0
1
Disable communication.
Reception only
Transmission only
Transmission/reception
DAP
13
0n
CKP
12
0n
Selection of masking of error interrupt signal (INTSREx (x = 0 , 1))
SCKp
SOp
SIp input timing
SCKp
SOp
SIp input timing
SCKp
SOp
SIp input timing
SCKp
SOp
SIp input timing
CHAPTER 13 SERIAL ARRAY UNIT
11
0
Selection of data and clock phase in CSI mode
User’s Manual U19678EJ1V1UD
EOC
10
0n
2
PTC
C mode, and during UART transmission
0n1
D7 D6 D5 D4 D3 D2 D1 D0
Setting of operation mode of channel n
D7 D6 D5 D4 D3 D2 D1 D0
9
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
PTC
0n0
8
After reset: 0087H
DIR
0n
7
6
0
2
C mode.
SLC
0n1
5
R/W
SLC
0n0
4
Note
.
3
0
DLS
0n2
2
DLS
0n1
Type
1
1
2
3
4
DLS
0n0
0