UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 944

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UPD78F1211GB-GAF-AX

Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1211GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
942
Note A flowchart is shown on the next page.
Remarks 1. If bit 2 (LVISEL) of the low voltage detection register (LVIM) is set to “1”, the meanings of the above
2. n = 00 to 11
No
words change as follows.
• Supply voltage (V
• Detection voltage (V
Figure 21-9. Example of Software Processing After Reset Release (1/2)
Restarting timer array unit
Setting timer array unit
(to measure 50 ms)
(TTn = 1 → TSn = 1)
50 ms has passed?
voltage or higher
processing <1>
processing <2>
Clearing WDT
(TMIFn = 1?)
Initialization
Initialization
(LVIF = 0?)
Setting LVI
Detection
Reset
No
Yes
LVI reset
DD
CHAPTER 21 LOW-VOLTAGE DETECTOR
)
LVI
) → Detection voltage (V
Yes
→ Input voltage from external input pin (EXLVI)
User’s Manual U19678EJ1V1UD
;
; Setting of detection level by LVIS.
; f
; Initial setting for port.
; The timer counter is cleared and the timer is started.
Check the reset source, etc.
The low-voltage detector operates (LVION = 1).
Source: f
Timer starts (TSn = 1).
Setting of division ratio of system clock,
such as setting of timer or A/D converter.
CLK
= Internal high-speed oscillation clock (8.4 MHz (MAX.)) (default)
Where comparison value = 102: ≅ 50 ms
CLK
(8.4 MHz (MAX.))/2
EXLVI
Note
= 1.21 V)
12
,

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