UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 977

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

serial communication For flash memory programming, 1-line mode is used. 1-line mode or 2-line mode is used for on-
chip debugging. Table 25-1 lists the differences between 1-line mode and 2-line mode.
25.2 On-Chip Debug Security ID
OPTION BYTE) and an on-chip debug security ID setting area at 000C4H to 000CDH, to prevent third parties from
reading memory content.
in advance, because 000C3H, 000C4H to 000CDH and 010C3H, and 010C4H to 010CDH are switched.
Function User’s Manual (U18371E).
25.3 Securing of User Resources
memory space must be done beforehand.
1-line mode (single line UART) using the TOOL0 pin or 2-line mode using the TOOL0 and TOOL1 pins is used for
Remark 2-line mode is not used for flash programming, however, even if TOOL1 pin is connected with CLK_IN of
The 78K0R/Ix3 has an on-chip debug operation control bit in the flash memory at 000C3H (see CHAPTER 23
When the boot swap function is used, also set a value that is the same as that of 010C3H and 010C4H to 010CDH
For details on the on-chip debug security ID, refer to the QB-MINI2 On-Chip Debug Emulator with Programming
To perform communication between the 78K0R/Ix3 and QB-MINI2, as well as each debug function, the securing of
If NEC Electronics assembler RA78K0R or compiler CC78K0R is used, the items can be set by using linker options.
(1) Securement of memory space
The shaded portions in Figure 25-2 are the areas reserved for placing the debug monitor program, so user
programs or data cannot be allocated in these spaces. When using the on-chip debug function, these spaces
must be secured so as not to be used by the user program. Moreover, this area must not be rewritten by the
user program.
1-line mode
2-line mode
Communicat
ion mode
QB-MINI2, writing is performed normally with no problem.
000C4H to 000CDH
010C4H to 010CDH
Table 25-1. Lists the Differences Between 1-line Mode and 2-line Mode.
Address
Available
None
Flash memory
programming
function
CHAPTER 25 ON-CHIP DEBUG FUNCTION
Table 25-2. On-Chip Debug Security ID
Any ID code of 10 bytes
• Pseudo real-time RAM monitor (RRM) function not supported
• Pseudo real-time RAM monitor (RRM) function supported
User’s Manual U19678EJ1V1UD
On-Chip Debug Security ID
Debugging function
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