UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 841

• Manufacturer Part Number: UPD78F1211GB-GAF-AX
• Description: MCU 16BIT 78K0R/LX3 44-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1211GB-GAF-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(1) Multiplication/division data register A (MDAH, MDAL)
Symbol
Symbol
Address:
MDAH
MDAL
The MDAH and MDAL registers set the values that are used for a multiplication or division operation and store
the operation result. They set the multiplier and multiplicand data in the multiplication mode, and set the
dividend data in the division mode. Furthermore, the operation result (quotient) is stored in the MDAH and
MDAL registers in the division mode.
MDAH and MDAL can be set by a 16-bit manipulation instruction.
Reset signal generation clears these registers to 0000H.
Cautions 1. Do not rewrite the MDAH and MDAL values during division operation processing (while
The following table shows the functions of MDAH and MDAL during operation execution.
Remark
DIVMODE
FFFF0H, FFFF1H, FFFF2H, FFFF3H
0
1
MDAH
MDAL
15
15
Figure 15-2. Format of Multiplication/Division Data Register A (MDAH, MDAL)
DIVMODE: Bit 7 of the multiplication/division control register (MDUC)
2. The MDAH and MDAL values read during division operation processing (while MDUC is
MDAH
MDAL
Table 15-2. Functions of MDAH and MDAL During Operation Execution
the multiplication/division control register (MDUC) is 81H). The operation will be executed
in this case, but the operation result will be an undefined value.
81H) will not be guaranteed.
14
14
Multiplication mode
Division mode
MDAH
MDAL
13
13
Operation Mode
MDAH
MDAL
12
12
FFFF3H
FFFF1H
MDAH
MDAL
CHAPTER 15 MULTIPLIER/DIVIDER
11
11
User’s Manual U19678EJ1V1UD
MDAH
MDAL
10
10
After reset: 0000H, 0000H R/W
MDAH: Multiplier
MDAL: Multiplicand
MDAH: Divisor (higher 16 bits)
MDAL: Dividend (lower 16 bits)
MDAH
MDAL
9
9
MDAH
MDAL
8
8
Setting
MDAH
MDAL
7
7
MDAH
MDAL
6
6
MDAH
MDAL
5
5
MDAH
MDAL
MDAH: Division result (quotient)
MDAL: Division result (quotient)
FFFF2H
4
FFFF0H
4
MDAH
MDAL
Higher 16 bits
Lower 16 bits
3
3
Operation Result
MDAH
MDAL
2
2
−
MDAH
MDAL
1
1
MDAH
MDAL
0
0
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