UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 309

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UPD78F1211GB-GAF-AX

Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1211GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.4 Basic Rules of Simultaneous Channel Operation Function
mainly counting the cycle) and slave channels (timers operating according to the master channel), the following rules
apply.
slave channels forming one simultaneous channel operation function).
channel operation function above do not apply to the channel groups.
When simultaneously using multiple channels, namely, a combination of a master channel (a reference timer
(1) Only an even channel (channel 0, 2, 4, etc.) can be set as a master channel.
(2) Any channel, except channel 0, can be set as a slave channel.
(3) The slave channel must be lower than the master channel.
(4) Two or more slave channels can be set for one master channel.
(5) When two or more master channels are to be used, slave channels with a master channel between them may
(6) A master channel can transmit INTTMn (interrupt), start software trigger, and count clock to the lower channels.
(7) A slave channel can use the INTTMn (interrupt), start software trigger, or the count clock of the master
(8) A master channel cannot use the INTTMn (interrupt), start software trigger, or the count clock from the other
(9) To simultaneously start channels that operate in combination, the channel start trigger bit (TSn) of the
(10) To stop the channels in combination simultaneously, the channel stop trigger bit (TTn) of the channels in
Remark
The rules of the simultaneous channel operation function are applied in a channel group (a master channel and
If two or more channel groups that do not operate in combination are specified, the basic rules of the simultaneous
Example: If channel 2 is set as a master channel, channel 3 or those that follow (channels 3, 4, 5, etc.) can
not be set.
Example: If channels 0 and 4 are set as master channels, channels 1 to 3 can be set as the slave channels
channel as a source clock, but it cannot transmit its own INTTMn (interrupt), start software trigger, or the count
clock to the lower channel.
higher master channel as a source clock.
channels in combination must be set at the same time.
combination must be set at the same time.
n = 00 to 11 (n = 00, 02, 04, 06, 08, 10 for master channel.)
be set as a slave channel.
of master channel 0. Channels 5 to 7 cannot be set as the slave channels of master channel 0.
CHAPTER 6 TIMER ARRAY UNIT TAUS
User’s Manual U19678EJ1V1UD
307

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