UPD78F1211GB-GAF-AX Renesas Electronics America, UPD78F1211GB-GAF-AX Datasheet - Page 385

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UPD78F1211GB-GAF-AX

Manufacturer Part Number
UPD78F1211GB-GAF-AX
Description
MCU 16BIT 78K0R/LX3 44-LQFP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1211GB-GAF-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1211GB-GAF-AX
Manufacturer:
Renesas Electronics America
Quantity:
10 000
7.4 Basic Rule of Real-time Output Function
The basic rules of using the real-time output function are as follows.
Remark n = 01 to 11 (Trigger generation channel: n = 01 to 10)
(1) Set TREn to 1 to reflect the real-time output (set value of TROn) in the TOn output.
(2) The timing of when the set value of TROn is reflected in the TOn output is controlled by the INTTMn interrupt
(3) If TROn is changed during real-time output, the changed value is reflected in the TOn output by the
(4) The trigger generation channel is the channel in which TRCn is set to 1.
(5) The lower channel of the trigger generation channel (TRCn = 1), in which TRCn is set to 0, is controlled by
(6) Even if TREn is set to 0 and TRCn is set to 1, the channel in which TRCn is set to 1 becomes the trigger
(7) Even if TREn is set to 1, if that channel or higher channel is not set as the trigger generation channel (TRCn
(8) If TRC00 is set to 0 in channel 0, there will be no trigger generation channel set for the higher channel of
of the trigger generation channel.
occurrence of the INTTMn interrupt of the trigger generation channel. The set value of TROn is not reflected
in the TOn output when any interrupt other than the INTTMn interrupt of the trigger generation channel
occurs.
The trigger generation channel can be set regardless of whether the channel is a master or slave.
the trigger generation channel. The higher channel of the trigger generation channel cannot be controlled by
the trigger generation channel.
Example: If TRC02, TRC05, and TRC07 are set to 1 and the other TRCm (m = 03, 04, 06, 08 to 11) are set
generation channel.
= 1), real-time output is not possible.
Example: If TRC00 and TRC01 are set to 0 and TRC02 is set to 1, channel 2 becomes the trigger generation
channel 0, so even if TRE00 is set to 1, real-time output cannot be used for channel 0.
In this case, if TRE00 is set to 0 and TRE01 and TRE02 are set to 1:
to 0, channels 2, 5, and 7 become the trigger generation channels.
channel.
In the case of channel 2, channel 2 and the lower channels in which TRC03 and TRC04 are set
to 0 (channels 3 and 4) are controlled.
In the case of channel 5, channel 5 and the lower channels in which TRC06 is set to 0 (channel
6) are controlled.
In the case of channel 7, channel 7 and the lower channels in which TRC08 to TRC11 are set
to 0 (channel 8 to 11) are controlled.
TRE00 = 0 in channel 0, so real-time output cannot be used.
TRE01 = 1 in channel 1, but neither channel 1 nor its higher channel are set as the trigger
generation channel, so real-time output cannot be used.
TRE02 = 1 in channel 2, and channel 2 is set as the trigger generation channel, so real-time
output can be used.
CHAPTER 7 INVERTER CONTROL FUNCTIONS
User’s Manual U19678EJ1V1UD
383

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