AT91SAM7S128C-MU Atmel, AT91SAM7S128C-MU Datasheet - Page 111

IC MCU ARM7 128K FLASH 64-QFN

AT91SAM7S128C-MU

Manufacturer Part Number
AT91SAM7S128C-MU
Description
IC MCU ARM7 128K FLASH 64-QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7S128C-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Core
ARM7TDMI
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
AT91SAM7S128-MU
AT91SAM7S128-MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S128C-MU
Manufacturer:
ATMEL
Quantity:
670
Figure 19-6. Example of Partial Page Programming
19.2.4.2
6175K–ATARM–30-Aug-10
16 words
16 words
16 words
16 words
Erase All Command
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
Erase All Flash
Page 7 erased
32 bits wide
Step 1.
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
...
...
...
...
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
The Partial Programming mode works only with 32-bit (or higher) boundaries. It cannot be used
with boundaries lower than 32 bits (8 or 16-bit for example).
After programming, the page (the whole lock region) can be locked to prevent miscellaneous
write or erase sequences. The lock bit can be automatically set after page programming using
WPL.
Data to be written are stored in an internal latch buffer. The size of the latch buffer corresponds
to the page size. The latch buffer wraps around within the internal memory area address space
and appears to be repeated by the number of pages in it.
Note:
Data are written to the latch buffer before the programming command is written to the Flash
Command Register MC_FCR. The sequence is as follows:
Two errors can be detected in the MC_FSR register after a programming sequence:
The entire memory can be erased if the Erase All Command (EA) in the Flash Command Regis-
ter MC_FCR is written.
• Write the full page, at any page address, within the internal memory area address space
• Programming starts as soon as the page number and the programming command are written
• When programming is completed, the bit FRDY in the Flash Programming Status Register
• Programming Error: A bad keyword and/or an invalid command have been written in the
• Lock Error: The page to be programmed belongs to a locked region. A command must be
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
using only 32-bit access.
to the Flash Command Register. The FRDY bit in the Flash Programming Status Register
(MC_FSR) is automatically cleared.
(MC_FSR) rises. If an interrupt was enabled by setting the bit FRDY in MC_FMR, the
interrupt line of the Memory Controller is activated.
MC_FCR register.
previously run to unlock the corresponding region.
Writing of 8-bit and 16-bit data is not allowed and may lead to unpredictable data corruption.
Programming of the second part of Page 7
FF
FF
FF
CA FE
CA FE
CA FE
FF
FF
FF
FF
FF
FF
(NEBP = 1)
32 bits wide
FF
FF
FF
FF
FF
FF
FF
FF
FF
Step 2.
...
...
...
...
AT91SAM7S Series Preliminary
CA
CA
CA
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FF
FE
FE
FE
Programming of the third part of Page 7
CA FE
CA FE
CA FE
FF
FF
FF
DE CA
DE CA
DE CA
FF
FF
FF
(NEBP = 1)
32 bits wide
FF
FF
FF
FF
FF
FF
Step 3.
...
...
...
...
CA
CA
CA
FF
FF
FF
DE CA
DE CA
DE CA
FF
FF
FF
FF
FF
FF
FE
FE
FE
FF
FF
FF
111

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