AT91SAM7S128C-MU Atmel, AT91SAM7S128C-MU Datasheet - Page 249
AT91SAM7S128C-MU
Manufacturer Part Number
AT91SAM7S128C-MU
Description
IC MCU ARM7 128K FLASH 64-QFN
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7S128C-MU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Core
ARM7TDMI
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
AT91SAM7S128-MU
AT91SAM7S128-MU
AT91SAM7S128-MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7S128C-MU
Manufacturer:
ATMEL
Quantity:
670
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Table 27-2.
Notes:
6175K–ATARM–30-Aug-10
Offset
0x0070
0x0074
0x0078
0x007C
to
0x009C
0x00A0
0x00A4
0x00A8
0x00AC
1. Reset value of PIO_PSR depends on the product implementation.
2. PIO_ODSR is Read-only or Read/Write depending on PIO_OWSR I/O lines.
3. Reset value of PIO_PDSR depends on the level of the I/O lines. Reading the I/O line levels requires the clock of the PIO
4. PIO_ISR is reset at 0x0. However, the first read of the register may read a different value as input changes may have
5. Only this set of registers clears the status by writing 1 in the first register and sets the status by writing 1 in the second
Controller to be enabled, otherwise PIO_PDSR reads the levels present on the I/O line at the time the clock was disabled.
occurred.
register.
Register Mapping (Continued)
Register
Peripheral A Select Register
Peripheral B Select Register
AB Status Register
Reserved
Output Write Enable
Output Write Disable
Output Write Status Register
Reserved
(5)
(5)
(5)
AT91SAM7S Series Preliminary
Name
PIO_ASR
PIO_BSR
PIO_ABSR
PIO_OWER
PIO_OWDR
PIO_OWSR
Write-only
Write-only
Read-only
Write-only
Write-only
Read-only
Access
0x00000000
0x00000000
Reset
–
–
–
–
249
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