AT91SAM7S128C-MU Atmel, AT91SAM7S128C-MU Datasheet - Page 197

• Manufacturer Part Number: AT91SAM7S128C-MU
• Description: IC MCU ARM7 128K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S128C-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Core: ARM7TDMI
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S128-MU; AT91SAM7S128-MU

25.8
25.8.1
25.8.2
6175K–ATARM–30-Aug-10
Clock Switching Details
Master Clock Switching Timings
Clock Switching Waveforms
Table 25-1
selected clock to another one. This is in the event that the prescaler is de-activated. When the
prescaler is activated, an additional time of 64 clock cycles of the new selected clock has to be
added.
Table 25-1.
Figure 25-3. Switch Master Clock from Slow Clock to PLL Clock
To
Main Clock
SLCK
PLL Clock
Write PMC_MCKR
From
Master Clock
gives the worst case timings required for the Master Clock to switch from one
Slow Clock
PLL Clock
MCKRDY
Clock Switching Timings (Worst Case)
LOCK
PLLCOUNT x SLCK +
0.5 x Main Clock +
0.5 x Main Clock +
2.5 x PLLx Clock
Main Clock
4.5 x SLCK
4 x SLCK +
–
AT91SAM7S Series Preliminary
PLLCOUNT x SLCK
2.5 x PLL Clock +
2.5 x Main Clock
4 x SLCK +
5 x SLCK +
SLCK
–
PLLCOUNT x SLCK
2.5 x PLL Clock +
3 x PLL Clock +
3 x PLL Clock +
1 x Main Clock
4 x SLCK +
4 x SLCK +
PLL Clock
5 x SLCK
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