AT91SAM7S128C-MU Atmel, AT91SAM7S128C-MU Datasheet - Page 41

IC MCU ARM7 128K FLASH 64-QFN

AT91SAM7S128C-MU

Manufacturer Part Number
AT91SAM7S128C-MU
Description
IC MCU ARM7 128K FLASH 64-QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7S128C-MU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
Core
ARM7TDMI
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
AT91SAM7S128-MU
AT91SAM7S128-MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7S128C-MU
Manufacturer:
ATMEL
Quantity:
670
11. ARM7TDMI Processor Overview
11.1
6175K–ATARM–30-Aug-10
Overview
The ARM7TDMI core executes both the 32-bit ARM
ing the user to trade off between high performance and high code density.The ARM7TDMI
processor implements Von Neuman architecture, using a three-stage pipeline consisting of
Fetch, Decode, and Execute stages.
The main features of the ARM7TDMI processor are:
• ARM7TDMI Based on ARMv4T Architecture
• Two Instruction Sets
• Three-Stage Pipeline Architecture
– ARM
– Thumb
– Instruction Fetch (F)
– Instruction Decode (D)
– Execute (E)
®
High-performance 32-bit Instruction Set
®
High Code Density 16-bit Instruction Set
AT91SAM7S Series Preliminary
®
and 16-bit Thumb
®
instruction sets, allow-
41

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