AT91SAM7S128C-MU Atmel, AT91SAM7S128C-MU Datasheet - Page 200

• Manufacturer Part Number: AT91SAM7S128C-MU
• Description: IC MCU ARM7 128K FLASH 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S128C-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• Core: ARM7TDMI
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: AT91SAM7S128-MU; AT91SAM7S128-MU

25.9
Table 25-2.
Notes:
200
0x0070 - 0x007C
0x000C
0x001C
0x002C
0x003C
0x006C
0x0000
0x0004
0x0008
0x0010
0x0014
0x0018
0x0020
0x0024
0x0028
0x0030
0x0038
0x0040
0x0044
0x0048
0x0060
0x0064
0x0068
Offset
Power Management Controller (PMC) User Interface
1. UDP bit of this register doe not pertain to AT91SAM7S32/16.
2. USBDIV bit of this register does not pertain to AT91SAM7S32/16
...
AT91SAM7S Series Preliminary
Register Mapping
Register
Reserved
Reserved
Reserved
PLL Register
Reserved
Reserved
Programmable Clock 0 Register
Programmable Clock 1 Register
Programmable Clock 2 Register
...
Reserved
System Clock Enable Register
System Clock Disable Register
System Clock Status Register
Peripheral Clock Enable Register
Peripheral Clock Disable Register
Peripheral Clock Status Register
Main Oscillator Register
Main Clock Frequency Register
Master Clock Register
Interrupt Enable Register
Interrupt Disable Register
Status Register
Interrupt Mask Register
Name
PMC_SCER
PMC_SCDR
PMC _SCSR
PMC _PCER
PMC_PCDR
PMC_PCSR
CKGR_MOR
CKGR_MCFR
CKGR_PLLR
PMC_MCKR
PMC_PCK0
PMC_PCK1
PMC_PCK2
...
PMC_IER
PMC_IDR
PMC_SR
PMC_IMR
–
–
–
–
–
–
(1)
(1)
(1)
(2)
...
Read-write
Read-write
Read-write
Read-write
Read-write
Read-write
Write-only
Write-only
Read-only
Write-only
Write-only
Read-only
Read-only
Write-only
Write-only
Read-only
Read-only
Access
–
–
–
–
–
–
6175K–ATARM–30-Aug-10
...
0x3F00
Reset
0x08
0x01
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
--
--
–
–
–
–
–
–
–
–
–
–