PIC18F87J72-I/PT Microchip Technology, PIC18F87J72-I/PT Datasheet - Page 238

• Manufacturer Part Number: PIC18F87J72-I/PT
• Description: IC PIC MCU 8BIT 14KB FLSH 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F87J72-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: 80-TQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
• Number Of I /o: 51
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 12x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: SPI, USART, SPI, I2C
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 51
• Number Of Timers: 4
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 14
• Controller Family/series: PIC18F
• No. Of I/o's: 51
• Ram Memory Size: 3923Byte
• Cpu Speed: 48MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18F87J72 FAMILY
TABLE 18-4:
DS39979A-page 238
INTCON
PIR1
PIE1
IPR1
PIR2
PIE2
IPR2
TRISC
SSPBUF
SSPADD
SSPCON1
SSPCON2
SSPSTAT
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
Note 1:
Name
Alternate bit definitions for use in I
MSSP Receive Buffer/Transmit Register
MSSP Address Register (I
MSSP Baud Rate Reload Register (I
GIE/GIEH PEIE/GIEL
OSCFIF
OSCFIE
OSCFIP
TRISC7
WCOL
GCEN
GCEN
Bit 7
SMP
—
—
—
REGISTERS ASSOCIATED WITH I
ACKSTAT
ACKSTAT ADMSK5
TRISC6
SSPOV
CMIE
CMIP
ADIE
ADIP
CMIF
ADIF
Bit 6
CKE
TMR0IE
TRISC5
SSPEN
ACKDT
RC1IF
RC1IE
RC1IP
Bit 5
2
D/A
—
—
—
C™ Slave mode),
(1)
2
C Slave mode operations only.
ADMSK4
2
TRISC4
ACKEN
INT0IE
C Master mode)
TX1IE
TX1IP
TX1IF
Preliminary
Bit 4
CKP
—
—
—
P
(1)
2
C™ OPERATION
ADMSK3
TRISC3
SSPM3
SSPIF
SSPIE
SSPIP
BCLIE
BCLIP
BCLIF
RCEN
RBIE
Bit 3
S
(1)
ADMSK2
TMR0IF
TRISC2
SSPM2
LVDIE
LVDIP
LVDIF
Bit 2
PEN
R/W
—
—
—
(1)
ADMSK1
TMR2IF
TMR2IE
TMR2IP
TMR3IF
TMR3IE
TMR3IP
TRISC1
SSPM1
INT0IF
 2010 Microchip Technology Inc.
RSEN
Bit 1
UA
(1)
2
C™ mode.
TMR1IF
TMR1IE
TMR1IP
TRISC0
SSPM0
RBIF
Bit 0
SEN
SEN
BF
—
—
—
on Page
Values
Reset
49
52
52
52
52
52
52
52
50
50
50
50
50