C500DA101 Omron, C500DA101 Datasheet - Page 94

• Manufacturer Part Number: C500DA101
• Description: ANALOG OUTPUT UNIT
• Manufacturer: Omron

Specifications of C500DA101

• Leaded Process Compatible: No
• Peak Reflow Compatible (260 C): No
• No. Of Analog Outputs: 4
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Output Word
Input Word
Data Exchange with CPU Unit
n:
F
From
CPU Unit
to Analog
I/O Unit
n+1:
n+1:
F
From
Analog
I/O Unit
I/O Unit
to CPU
Unit
Direction
Direction
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Bit
Bit
PC Busy
PC Write Complete
PC Read Complete
EEPROM write bit
Serial port write enable bit
High/low alarm reset bit
Out-of-range error reset bit
Peak hold reset bank select bit
Peak hold register 1/9 reset bit
Peak hold register 2/10 reset bit
Peak hold register 3/11 reset bit
Peak hold register 4/12 reset bit
Peak hold register 5/13 reset bit
Peak hold register 6/14 reset bit
Peak hold register 7/15 reset bit
Peak hold register 8/16 reset bit
A/D Busy
A/D Read Complete
A/D Write Complete
Unconfirmed data error flag
Conversion error flag
High/low alarm error flag
Out-of-range error flag
Unit good flag
Peak hold reset 1/9 acknowledged flag
Peak hold reset 2/10 acknowledged flag
Peak hold reset 3/11 acknowledged flag
Peak hold reset 4/12 acknowledged flag
Peak hold reset 5/13 acknowledged flag
Peak hold reset 6/14 acknowledged flag
Peak hold reset 7/15 acknowledged flag
Peak hold reset 8/16 acknowledged flag
Name
Name
These bits operate automatically when executing I/O
READ/WRITE i
READ/WRITE instructions. It is not possible for the user to
write to these bits. Set to 0 when outputting word n using an
write to these bits. Set to 0 when outputting word n using an
output instruction, such as the MOV instruction.
Turn ON this bit to cause the Unit to write the current RAM
configuration to EEPROM memory in the Unit. On power up,
the new parameters will be the default start up parameters.
This bit enables/disables the serial port on the Unit for writing
to the Unit memory map.
Turns OFF bit 5 of word n+1, the High/Low Alarm Flag.
Turns OFF bit 6 of word n+1, the Out-of-range Flag.
Selects which bank of peak hold registers to reset. When this
bit is OFF, bits 8 to 15 correspond to input points 1 through 8.
When this bit is ON, bits 8 to 15 correspond to input points 9
to 16.
These bits reset the peak hold registers in the Unit memory
map for the input points specified.
These bits operate automatically when executing I/O
READ/WRITE instructions.
This flag is turned ON when invalid data is received
from the serial port or an I/O WRITE instruction. The
flag is turned OFF when valid data is sent to the Unit.
This flag is turned ON if the Unit detects an internal
conversion or calculation error.
This flag is turned ON when a high/low alarm occurs for
any input point.
This flag is turned ON when an out-of-range range error
occurs for any input point.
This flag oscillates at a rate of 1 Hz when the Unit is
operating correctly, 0.5 s ON, 0.5 s OFF.
These flags acknowledge that the peak hold registers
have been reset by the Unit.
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Description
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Description
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