IPR-RLDII/UNI Altera, IPR-RLDII/UNI Datasheet - Page 36

• Manufacturer Part Number: IPR-RLDII/UNI
• Description: IP CORE Renewal Of IP-RLDII/UNI
• Manufacturer: Altera

Specifications of IPR-RLDII/UNI

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GZ, Stratix III, Stratix IV, HardCopy III
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

4–2
Compile the Design
External Memory Interface Handbook Volume 3
Section IV. RLDRAM II Controller with UniPHY IP User Guide
f
To compile the design, on the Processing menu, click Start Compilation.
After you have compiled the top-level file, you can perform RTL simulation or
program your targeted Altera device to verify the top-level file in hardware.
For more information about simulating, refer to the
the External Memory Interface Handbook.
Simulation
Chapter 4: Constraining and Compiling
December 2010 Altera Corporation
section in volume 4 of
Compile the Design