IPR-RLDII/UNI Altera, IPR-RLDII/UNI Datasheet - Page 56

• Manufacturer Part Number: IPR-RLDII/UNI
• Description: IP CORE Renewal Of IP-RLDII/UNI
• Manufacturer: Altera

Specifications of IPR-RLDII/UNI

• Software Application: IP CORE, Memory Controllers, SDRAM
• Supported Families: Arria II GZ, Stratix III, Stratix IV, HardCopy III
• Core Architecture: FPGA
• Core Sub-architecture: Arria, HardCopy, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

6–16
PHY-to-Controller Interfaces
External Memory Interface Handbook Volume 3
Section IV. RLDRAM II Controller with UniPHY IP User Guide
Table 6–10. AFI New Signal Names
This section describes the typical modules that are connected to the UniPHY PHY and
the port name prefixes each module uses. This section describes using a custom
controller and describes the AFI.
The AFI standardizes and simplifies the interface between controller and PHY for all
Altera memory designs, thus allowing you to easily interchange your own controller
code with Altera's high-performance controllers. The AFI PHY includes an
administration block that configures the memory for calibration and performs
necessary accesses to mode registers that configure the memory as required (these
calibration processes are different).
For half-rate designs, the address and command signals in the UniPHY are asserted
for one mem_clk cycle (1T addressing), such that there are two input bits per address
and command pin in half-rate designs. If you require a more conservative 2T
addressing, drive both input bits (of the address and command signal) identically in
half-rate designs.
Figure 6–8
Figure 6–8. Half-Rate Write with Word-Aligned Data
afi_wlat
afi_rdata_en
afi_rdata
afi_mem_clk_disable
afi_cal_success
afi_cal_fail
afi_cal_req
afi_wdata_valid
afi_dqs_burst
afi_wdata
afi_clk
shows the half-rate write operation.
AFI Name
00
00
--
10
ba
11
11
ctl_wlat
ctl_doing_read
ctl_rdata
ctl_mem_clk_disable
ctl_cal_success
ctl_cal_fail
ctl_cal_req
dc
Chapter 6: Functional Description—UniPHY
December 2010 Altera Corporation
Old Name
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00
00
PHY-to-Controller Interfaces