CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 39

Eval Bd Ultra Low Power Stereo Codec

CDB42L55

Manufacturer Part Number
CDB42L55
Description
Eval Bd Ultra Low Power Stereo Codec
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L55

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L55
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1506
CDB-42L55
DS773F1
4.14.2 Memory Address Pointer (MAP)
4.14.2.1 Map Increment (INCR)
The device has MAP auto-increment capability enabled by the INCR bit (the MSB) of the MAP. If INCR is
set to 0, MAP will stay constant for successive I²C writes or reads. If INCR is set to 1, MAP will auto-in-
crement after each byte is read or written, allowing block reads or writes of successive registers.
Receive acknowledge bit.
Send stop condition, aborting write.
Send start condition.
Send 10010101 (chip address & read operation).
Receive acknowledge bit.
Receive byte, contents of selected register.
Send acknowledge bit.
Send stop condition.
Setting the auto-increment bit in the MAP allows successive reads or writes of consecutive registers. Each
byte is separated by an acknowledge bit.
The MAP byte comes after the address byte and selects the register to be read or written. Refer to the
pseudo code above for implementation details.
CS42L55
39

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