CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 55

Eval Bd Ultra Low Power Stereo Codec

CDB42L55

Manufacturer Part Number
CDB42L55
Description
Eval Bd Ultra Low Power Stereo Codec
Manufacturer
Cirrus Logic Inc
Datasheets

Specifications of CDB42L55

Main Purpose
Audio, CODEC
Embedded
Yes, FPGA / CPLD
Utilized Ic / Part
CS42L55
Primary Attributes
2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
Secondary Attributes
GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
Product
Audio Modules
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
598-1506
CDB-42L55
DS773F1
6.17.2 Beep Volume
6.18
6.18.1 Beep Configuration
6.18.2 Treble Corner Frequency
BEEP1
7
Beep & Tone Configuration (Address 16h)
Sets the volume of the beep signal.
Note:
Configures a beep mixed with the HP and Line output.
Notes:
1. When used in analog pass through mode, the output alternates between the signal from the PGA and
2. Re-engaging the beep before it has completed its initial cycle will cause the beep signal to remain ON
Sets the corner frequency for the treble shelving filter.
BPVOL[4:0]
00110
···
00000
11111
11110
···
00111
Step Size:
Application:
BEEP[1:0]
00
01
10
11
Application:
TREBCF[1:0]
00
01
10
11
the beep signal. The beep signal does not mix with the analog signal from the PGA.
for the maximum ONTIME duration.
BEEP0
This setting must not change when BEEP is enabled.
6
Gain
+12.0 dB
···
0 dB
-2 dB
-4 dB
···
-50 dB
2 dB
Off
Single
Multiple
Continuous
Treble Corner Frequency Setting
5 kHz
7 kHz
10 kHz
15 kHz
“Beep Generator” on page 31
Beep Occurrence
“Beep Generator” on page 31
Reserved
5
TREBCF1
4
TREBCF0
3
BASSCF1
2
BASSCF0
1
CS42L55
TCEN
0
55

Related parts for CDB42L55