CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 47

• Manufacturer Part Number: CDB42L55
• Description: Eval Bd Ultra Low Power Stereo Codec
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L55

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L55
• Primary Attributes: 2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
• Secondary Attributes: GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1506; CDB-42L55

DS773F1
6.8.2
6.8.3
6.9
6.9.1
6.9.2
6.9.3
HPFB
7
HPF Control (Address 09h)
Line Input Select
Selects the specified analog input signal into line amplifier x.
Note:
Headphone Input Select
Selects the specified analog input signal into headphone amplifier x.
Note:
ADCx High-Pass Filter
Configures the internal high-pass filter after ADCx.
ADCx High-Pass Filter Freeze
Configures the high pass filter’s digital DC subtraction and/or calibration after ADCx.
HPF x Corner Frequency
Sets the corner frequency (-3 dB point) for the internal High-Pass Filter (HPF).
LINExMUX
0
1
HPxMUX
0
1
HPFx
0
1
HPFRZx
0
1
HPFx_CF[1:0]
00
01
10
11
HPFRZB
The PGA path must not be selected while the Line Amplifier is powered down.
The PGA path must not be selected while the Headphone Amplifier is powered down.
6
Selected Input to Line Amplifier Ch. x
DACx
PGAx - Use PGAxMUX bit
Selected Input to HP Amplifier Ch. x
DACx
PGAx - Use PGAxMUX bit
High Pass Filter Status
Disabled
Enabled
High Pass Filter Digital Subtraction
Continuous DC Subtraction
Frozen DC Subtraction
HPF Corner Frequency Setting (Fs=48 kHz)
1.8 Hz
119 Hz
236 Hz
464 Hz
HPFA
5
HPFRZA
(“PGA x Input Select” on page
(“PGA x Input Select” on page
4
HPFB_CF1
3
49) to select an input channel.
49) to select an input channel.
HPFB_CF0
2
HPFA_CF1
1
CS42L55
HPFA_CF0
0
47