CDB42L55 Cirrus Logic Inc, CDB42L55 Datasheet - Page 43

• Manufacturer Part Number: CDB42L55
• Description: Eval Bd Ultra Low Power Stereo Codec
• Manufacturer: Cirrus Logic Inc

Specifications of CDB42L55

• Main Purpose: Audio, CODEC
• Embedded: Yes, FPGA / CPLD
• Utilized Ic / Part: CS42L55
• Primary Attributes: 2 Stereo Analog Inputs, Stereo Line and Headphone Outputs, S/PDIF Transmitter and Receiver
• Secondary Attributes: GUI, USB, RS232, I2C Interfaces, USB or External or Battery Power Supply
• Product: Audio Modules
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 598-1506; CDB-42L55

DS773F1
6.3
6.3.1
6.3.2
6.4
6.4.1
6.4.2
PDN_HPB1
Reserved
7
7
Power Control 2 (Address 03h)
Clocking Control 1 (Address 04h)
Headphone Power Control
Configures how the HPDETECT pin, 29, controls the power for the headphone amplifier.
Line Power Control
Configures how the HPDETECT pin, 29, controls the power for the line amplifier.
Master/Slave Mode
Configures the serial port I/O clocking.
SCLK Polarity
Configures the polarity of the SCLK signal.
PDN_HPx[1:0]
00
01
10
11
PDN_LINx[1:0]
00
01
10
11
M/S
0
1
Application:
INV_SCLK
0
1
PDN_HPB0
Reserved
6
6
Headphone Status
Headphone channel is ON when the HPDETECT pin, 29, is LO.
Headphone channel is OFF when the HPDETECT pin, 29, is HI.
Headphone channel is ON when the HPDETECT pin, 29, is HI.
Headphone channel is OFF when the HPDETECT pin, 29, is LO.
Headphone channel is always ON.
Headphone channel is always OFF.
Line Status
Line channel is ON when the HPDETECT pin, 29, is LO.
Line channel is OFF when the HPDETECT pin, 29, is HI.
Line channel is ON when the HPDETECT pin, 29, is HI.
Line channel is OFF when the HPDETECT pin, 29, is LO.
Line channel is always ON.
Line channel is always OFF.
Serial Port Clocks
Slave (Input ONLY)
Master (Output ONLY)
“Serial Port Clocking” on page 34
SCLK Polarity
Not Inverted
Inverted
PDN_HPA1
M/S
5
5
PDN_HPA0
INV_SCLK
4
4
PDN_LINB1
SCK=MCK1
3
3
PDN_LINB0
SCK=MCK0
2
2
PDN_LINA1
MCLKDIV2
1
1
CS42L55
PDN_LINA0
MCLKDIS
0
0
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