ADSP-TS101SAB2-000 Analog Devices Inc, ADSP-TS101SAB2-000 Datasheet - Page 15

• Manufacturer Part Number: ADSP-TS101SAB2-000
• Description: IC,DSP,32-BIT,BGA,484PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: TigerSHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-TS101SAB2-000

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Link Port, Multi-Processor
• Clock Rate: 250MHz
• Non-volatile Memory: External
• On-chip Ram: 768kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 484-BGA
• Package: 484BGA
• Numeric And Arithmetic Format: Fixed-Point|Floating-Point
• Maximum Speed: 250 MHz
• Ram Size: 768 KB
• Device Million Instructions Per Second: 250 MIPS
• Other names: ADSP-TS101SAB2000

Table 6. Pin Definitions—External Port Arbitration (Continued)
1
2
3
Table 7. Pin Definitions—External Port DMA/Flyby
1
2
Signal
HBG
CPA
DPA
Type column symbols: A = asynchronous; G = ground; I = input; O = output; o/d = open drain output; P = power supply;
pd = internal pull-down approximately 100 k
Term (for termination) column symbols: epd = external pull-down approximately 10 k
to V
The internal pull-down may not be sufficient. A stronger pull-down may be necessary.
See
The internal pull-up may not be sufficient. A stronger pull-up may be necessary.
Signal
DMAR3–0
FLYBY
IOEN
Type column symbols: A = asynchronous; G = ground; I = input; O = output; o/d = open drain output; P = power supply;
pd = internal pull-down approximately 100 k
Term (for termination) column symbols: epd = external pull-down approximately 10 k
to V
The internal pull-up may not be sufficient. A stronger pull-up may be necessary.
See
Electrical Characteristics on Page 20
Electrical Characteristics on Page 20
DD-IO
DD-IO
3
1
1
, nc = not connected; au = always used.
, nc = not connected; au = always used.
Type
I/O/T (pu
I/O (o/d)
I/O (o/d)
Type
I/A
O/T (pu
O/T (pu
2
2
)
)
2
)
for maximum and minimum current consumption for pull-up and pull-down resistances.
for maximum and minimum current consumption for pull-up and pull-down resistances.
Term
nc
See
next
column
See
next
column
Term
epu
nc
nc
Description
Host Bus Grant. Acknowledges HBR and indicates that the host can take control of the external
bus. When relinquishing the bus, the master DSP three-states the ADDR31–0, DATA63–0, MSH,
MSSD, MS1–0, RD, WRL, WRH, BMS, BRST, FLYBY, IOEN, RAS, CAS, SDWE, SDA10, SDCKE, LDQM
and HDQM pins, and the DSP puts the SDRAM in self-refresh mode. The DSP asserts HBG until
the host deasserts HBR. In multiprocessor systems, the current bus master DSP drives HBG, and
all slave DSPs monitor HBG.
Core Priority Access. Asserted while the DSP’s core accesses external memory. This pin enables
a slave DSP to interrupt a master DSP’s background DMA transfers and gain control of the
external bus for core-initiated transactions. CPA is an open drain output, connected to all DSPs
in the system. The CPA pin has an internal 500  pull-up resistor, which is only enabled on the
DSP with ID2–0 = 0. If ID0 is not used, terminate this pin as either epu or nc. If ID7–1 is not used,
terminate this pin as epu.
DMA Priority Access. Asserted while a high-priority DSP DMA channel accesses external
memory. This pin enables a high-priority DMA channel on a slave DSP to interrupt transfers of
a normal-priority DMA channel on a master DSP and gain control of the external bus for DMA-
initiated transactions. DPA is an open drain output, connected to all DSPs in the system. The
DPA pin has an internal 500  pull-up resistor, which is only enabled on the DSP with ID2–0 = 0.
If ID0 is not used, terminate this pin as either epu or nc. If ID7–1 is not used, terminate this pin
as epu.

Description
DMA Request Pins. Enable external I/O devices to request DMA services from the DSP. In
response to DMARx, the DSP performs DMA transfers according to the DMA channel’s initial-
ization. The DSP ignores DMA requests from uninitialized channels.
Flyby Mode. When a DSP DMA channel is initiated in FLYBY mode, it generates flyby transactions
on the external bus. During flyby transactions, the DSP asserts FLYBY, which signals the source
or destination I/O device to latch the next data or strobe the current data, respectively, and to
prepare for the next data on the next cycle.
I/O Device Output Enable. Enables the output buffers of an external I/O device for flyby trans-
actions between the device and external memory. Active on flyby transactions.

; pu = internal pull-up approximately 100 k
; pu = internal pull-up approximately 100 k
Rev. C | Page 15 of 48 | May 2009


to V
to V


; T = three-state
; T = three-state
SS
SS
; epu = external pull-up approximately 10 k
; epu = external pull-up approximately 10 k
ADSP-TS101S

