ADSP-TS101SAB2-000 Analog Devices Inc, ADSP-TS101SAB2-000 Datasheet - Page 24

• Manufacturer Part Number: ADSP-TS101SAB2-000
• Description: IC,DSP,32-BIT,BGA,484PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: TigerSHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-TS101SAB2-000

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Link Port, Multi-Processor
• Clock Rate: 250MHz
• Non-volatile Memory: External
• On-chip Ram: 768kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 484-BGA
• Package: 484BGA
• Numeric And Arithmetic Format: Fixed-Point|Floating-Point
• Maximum Speed: 250 MHz
• Ram Size: 768 KB
• Device Million Instructions Per Second: 250 MIPS
• Other names: ADSP-TS101SAB2000

ADSP-TS101S
Table 25. Power-Up Reset Timing
1
Table 26. Normal Reset Timing
Parameter
Timing Requirements
t
t
t
t
Parameter
Timing Requirements
t
t
Applies after V
START_LO
PULSE1_HI
PULSE2_LO
TRST_PWR
RST_IN
STRAP
1
V
STRAP PINS
D D ,
STAT IC/STR AP
DD
V
D D_ A ,
RESET
SCL K/LCLK,
, V
DD_A
V
RESET
D D_IO ,
RESET Deasserted After V
Static/Strap Pins Are Stable and Within Specification
RESET Deasserted for First Pulse
RESET Asserted for Second Pulse
TRST Asserted During Power-Up Reset
RESET Asserted
RESET Deasserted After Strap Pins Stable
TRST
PINS
, V
DD_IO
, and SCLK/LCLK and static/strap pins are stable and within specification, and before RESET is deasserted.
t
RST_IN
DD
, V
DD_A
Figure 15. Normal Reset (Hot Reset) Timing
Figure 14. Power-Up Reset Timing
Rev. C | Page 24 of 48 | May 2009
, V
DD_IO
t
S TA R T_ LO
t
STRAP
t
, SCLK/LCLK, and
T RS T _P W R
t
P ULS E 1 _H I
Min
2
50
100
2
Min
100
2


t
t

SCLK

t
P U L S E2_ LO
SCLK
t
t
SCLK
SCLK
Max
100
Max

t
SCLK
ms
ms
Unit
ns
ns
ns
Unit
ns