ADSP-TS101SAB2-000 Analog Devices Inc, ADSP-TS101SAB2-000 Datasheet - Page 25

• Manufacturer Part Number: ADSP-TS101SAB2-000
• Description: IC,DSP,32-BIT,BGA,484PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: TigerSHARC®r
• Type: Fixed/Floating Pointr

Specifications of ADSP-TS101SAB2-000

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, Link Port, Multi-Processor
• Clock Rate: 250MHz
• Non-volatile Memory: External
• On-chip Ram: 768kB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 484-BGA
• Package: 484BGA
• Numeric And Arithmetic Format: Fixed-Point|Floating-Point
• Maximum Speed: 250 MHz
• Ram Size: 768 KB
• Device Million Instructions Per Second: 250 MIPS
• Other names: ADSP-TS101SAB2000

Table 27. AC Signal Specifications (for SCLK <16.7 ns) (All values in this table are in nanoseconds)
Name
ADDR31–0
DATA63–0
MSH
MSSD
MS1–0
RD
WRL
WRH
ACK
SDCKE
RAS
CAS
SDWE
LDQM
HDQM
SDA10
HBR
HBG
BOFF
BUSLOCK
BRST
BR7–0
FLYBY
IOEN
CPA
DPA
BMS
FLAG3–0
RESET
TMS
TDI
TDO
TRST
BM
EMU
JTAG_SYS_IN
JTAG_SYS_OUT
ID2–0
CONTROLIMP2–0
DS2–0
LCLKRAT2–0
SCLKFREQ
5
4
4
3, 4
5
3, 4
10
4, 7, 9
9
4, 7
9
6
9
9
11
12
9
Description
External Address Bus
External Data Bus
Memory Select Host Line
Memory Select SDRAM Line
Memory Select for Static Blocks
Memory Read
Write Low Word
Write High Word
Acknowledge for Data
SDRAM Clock Enable
Row Address Select
Column Address Select
SDRAM Write Enable
Low Word SDRAM Data Mask
High Word SDRAM Data Mask
SDRAM ADDR10
Host Bus Request
Host Bus Grant
Back Off Request
Bus Lock
Burst Access
Multiprocessing Bus Request
Flyby Mode Selection
Flyby I/O Enable
Core Priority Access
DMA Priority Access
Boot Memory Select
FLAG Pins
Global Reset
Test Mode Select (JTAG)
Test Data Input (JTAG)
Test Data Output (JTAG)
Test Reset (JTAG)
Bus Master Debug Aid Only
Emulation
System Input
System Output
Chip ID—Must Be Constant
Static Pins—Must Be Constant
Static Pins—Must Be Constant
Static Pins—Must Be Constant
Static Pins—Must Be Constant
Rev. C | Page 25 of 48 | May 2009
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
2.6
1.5
1.5
1.5
0.5
0.5
0.5
1.0
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
1.0
11.0
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
4.2
5.8
5.8
4.2
4.2
6.0
4.2
5.5
16.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
0.9
1.0
1.0
2.5
2.5
2.5
5.0
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
4.0
5.0
ADSP-TS101S
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
SCLK
TCK
TCK
TCK_FE
TCK
SCLK
TCK or LCLK
TCK
TCK_FE
8
8