FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 454

• Manufacturer Part Number: FW82801DB S L66K
• Manufacturer: Intel

Specifications of FW82801DB S L66K

• Lead Free Status / RoHS Status: Supplier Unconfirmed

SMBus Controller Registers (D31:F3)
13.1.9
13.1.10
13.1.11
13.1.12
454
SVID — Subsystem Vendor ID (SMBUS—D31:F2/F4)
Address Offset:
Default Value:
Lockable:
SID — Subsystem ID (SMBUS—D31:F2/F4)
Address Offset:
Default Value:
Lockable:
INTR_LN—Interrupt Line Register (SMBUS—D31:F3)
Address Offset:
Default Value:
INTR_PN—Interrupt Pin Register (SMBUS—D31:F3)
Address Offset:
Default Value:
Bit
7:0
15:0
15:0
Bit
Bit
Bit
7:0
Interrupt Line (INT_LN) — R/W. This data is not used by the ICH4. It is to communicate to software
the interrupt line that the interrupt pin is connected to PIRQB#.
Interrupt Pin (INT_PN) — RO.
02h = Indicates that the ICH4 SMBus controller will drive PIRQB# as its interrupt line.
Subsystem Vendor ID (SVID) — RO. The SVID register, in combination with the Subsystem ID
(SID) register, enables the operating system (OS) to distinguish subsystems from each other. The
value returned by reads to this register is the same as that which was written by BIOS into the
IDE_SVID register.
Subsystem ID (SID) — R/Write-Once. The SID register, in combination with the SVID register,
enables the operating system (OS) to distinguish subsystems from each other. The value returned
by reads to this register is the same as that which was written by BIOS into the IDE_SID register.
2Ch–2Dh
00h
No
2Eh–2Fh
00h
No
3Ch
00h
3Dh
02h
Description
Description
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
Attributes:
Size:
Attributes:
Size:
Intel
RO
16 bits
Core
RO
16 bits
Core
R/W
8 bits
RO
8 bits
®
82801DB ICH4 Datasheet