FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 539

• Manufacturer Part Number: FW82801DB S L66K
• Manufacturer: Intel

Specifications of FW82801DB S L66K

• Lead Free Status / RoHS Status: Supplier Unconfirmed

17.5
Intel
®
Figure 17-1. Clock Timing
Figure 17-2. Valid Delay from Rising Clock Edge
Figure 17-3. Setup and Hold Times
82801DB ICH4 Datasheet
Timing Diagrams
6. If the transition to S5 is due to Power Button Override, SLP_S3#, SLP_S4# and SLP_S5# are asserted
7. If there is no RTC battery in the system, so VccRTC and the VccSus supplies come up together, the delay
8. This value is programmable in multiples of 1024 PCI CLKs. Maximum is 8192 PCI CLKs (245.6 µs).
together similar to timing t194 (PCIRST# active to SLP_S3# active).
from RTCRST# and RSMRST# inactive to SUSCLK toggling may be as much as 2.5 seconds.
Output
Clock
Clock
Input
0.8V
High Time
2.0V
Fall Time
1.5V
VT
Setup Time
Valid Delay
Period
Low Time
VT
Hold Time
1.5V
VT
Rise Time
Electrical Characteristics
539