FW82801DB S L66K Intel, FW82801DB S L66K Datasheet - Page 561
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FW82801DB S L66K
Manufacturer Part Number
FW82801DB S L66K
Description
Manufacturer
Intel
Datasheet
1.FW82801DB_S_L66K.pdf
(587 pages)
Specifications of FW82801DB S L66K
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Register Index
Table A-1. Intel
Intel
Vendor Identification
Device Identification
PCI Command
PCI Device Status
Revision Identification
Sub Class Code
Base Class Code
Cache Line Size
Master Latency Timer
Header Type
CSR Memory-Mapped Base Address
CSR I/O-Mapped Base Address
Subsystem Vendor ID
Subsystem ID
Capabilities Pointer
Interrupt Line Register
Interrupt Pin Register
Minimum Grant Register
Maximum Latency Register
®
82801DB ICH4 Datasheet
Register Name
®
ICH4 PCI Configuration Registers (Sheet 1 of 10)
2C–2Dh
2E–2Fh
00–01h
02–03h
04–05h
06–07h
10–13h
14–17h
Offset
0Ah
0Bh
0Ch
0Dh
0Eh
3Ch
3Dh
3Eh
08h
34h
3Fh
LAN Controller (B1:D8:F0)
Section 7.1.1, “VID—Vendor ID Register (LAN Controller—B1:D8:F0)” on
page 7-252
Section 7.1.2, “DID—Device ID Register (LAN Controller—B1:D8:F0)” on
page 7-252
Section 7.1.3, “PCICMD—PCI Command Register (LAN Controller—
B1:D8:F0)” on page 7-253
Section 7.1.4, “PCISTS—PCI Status Register (LAN Controller—
B1:D8:F0)” on page 7-254
Section 7.1.5, “REVID—Revision ID Register (LAN Controller—
B1:D8:F0)” on page 7-255
Section 7.1.6, “SCC—Sub-Class Code Register (LAN Controller—
B1:D8:F0)” on page 7-255
Section 7.1.7, “BCC—Base-Class Code Register (LAN Controller—
B1:D8:F0)” on page 7-255
Section 7.1.8, “CLS—Cache Line Size Register (LAN Controller—
B1:D8:F0)” on page 7-255
Section 7.1.9, “PMLT—PCI Master Latency Timer Register (LAN
Controller—B1:D8:F0)” on page 7-256
Section 7.1.10, “HEADTYP—Header Type Register (LAN Controller—
B1:D8:F0)” on page 7-256
Section 7.1.11, “CSR_MEM_BASE CSR — Memory-Mapped Base
Address Register (LAN Controller—B1:D8:F0)” on page 7-256
Section 7.1.12, “CSR_IO_BASE — CSR I/O-Mapped Base Address
Register (LAN Controller—B1:D8:F0)” on page 7-257
Section 7.1.13, “SVID — Subsystem Vendor ID (LAN Controller—
B1:D8:F0)” on page 7-257
Section 7.1.14, “SID — Subsystem ID (LAN Controller—B1:D8:F0)” on
page 7-257
Section 7.1.15, “CAP_PTR — Capabilities Pointer (LAN Controller—
B1:D8:F0)” on page 7-258
Section 7.1.16, “INT_LN — Interrupt Line Register (LAN Controller—
B1:D8:F0)” on page 7-258
Section 7.1.17, “INT_PN — Interrupt Pin Register (LAN Controller—
B1:D8:F0)” on page 7-258
Section 7.1.18, “MIN_GNT — Minimum Grant Register (LAN Controller—
B1:D8:F0)” on page 7-258
Section 7.1.19, “MAX_LAT — Maximum Latency Register (LAN
Controller—B1:D8:F0)” on page 7-259
Datasheet Location
Register Index
A
561
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