IPSRAMQDRII Altera, IPSRAMQDRII Datasheet - Page 18

• Manufacturer Part Number: IPSRAMQDRII
• Manufacturer: Altera

Specifications of IPSRAMQDRII

• Lead Free Status / RoHS Status: Supplier Unconfirmed

QDRII SRAM Controller Walkthrough
2–8
QDRII SRAM Controller MegaCore Function User Guide
c
To generate an IP functional simulation model for your MegaCore
function, follow these steps:
1.
2.
3.
4.
5.
Step 4: Generate
1.
1
Click Step 3: Set Up Simulation in IP Toolbench.
Turn on Generate Simulation Model.
Choose the language in the Language list.
Some third-party synthesis tools can use a netlist that contains only
the structure of the MegaCore function, but not detailed logic, to
optimize performance of the design that contains the MegaCore
function. If your synthesis tool supports this feature, turn on
Generate netlist.
Click OK.
To generate your MegaCore function, click Step 4: Generate in IP
Toolbench.
You may only use these simulation model output files for
simulation purposes and expressly not for synthesis or any
other purposes. Using these models for synthesis will create a
nonfunctional design.
The Quartus II IP File (.qip) is a file generated by the
MegaWizard interface, and contains information about a
generated IP core. You are prompted to add this .qip file to the
current Quartus II project at the time of file generation. In most
cases, the .qip file contains all of the necessary assignments and
information required to process the core or system in the
Quartus II compiler. Generally, a single .qip file is generated for
each MegaCore function or system in the Quartus II compiler.
MegaCore Version 9.1
Altera Corporation
November 2009