IPSRAMQDRII Altera, IPSRAMQDRII Datasheet - Page 6

• Manufacturer Part Number: IPSRAMQDRII
• Manufacturer: Altera

Specifications of IPSRAMQDRII

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Features
Features
General
Description
1–2
QDRII SRAM Controller MegaCore Function User Guide
Table 1–2
Controller MegaCore function to each Altera device family.
■
■
■
■
■
■
■
■
The QDRII SRAM Controller MegaCore function provides an easy-to-use
interface to QDRII SRAM modules. The QDRII SRAM Controller ensures
that the placement and timing are in line with QDRII specifications.
The QDRII SRAM Controller is optimized for Altera Stratix series. The
advanced features available in these devices allow you to interface
directly to QDRII SRAM devices.
Figure 1–1
that the QDRII SRAM Controller MegaCore function creates for you.
Note to
(1)
HardCopy
Stratix
Stratix II
Stratix II GX
Stratix GX
Other device families
Table 1–2. Device Family Support
Support for burst of two and four memory type
Support for 8-, 18-, and 36-bit QDRII interfaces
Support for two-times and four-times data width on the local side
(four-times for burst of four only)
Operates at 300 MHz for QDRII and QDRII+ SRAM
Automatic concatenation of consecutive reads and writes (narrow
local bus width mode only)
Easy-to-use IP Toolbench interface
IP functional simulation models for use in Altera-supported VHDL
and Verilog HDL simulators
Support for OpenCore Plus evaluation
For more information on support for Stratix III or Stratix IV devices, contact
Altera.
®
Table
shows the level of support offered by the QDRII SRAM
®
shows a system-level diagram including the example design
II
MegaCore Version 9.1
Device Family
1–2:
(1)
Preliminary
Full
Full
Full
Full
No support
Support
Altera Corporation
November 2009