IPSRAMQDRII Altera, IPSRAMQDRII Datasheet - Page 9

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IPSRAMQDRII

Manufacturer Part Number
IPSRAMQDRII
Description
Manufacturer
Altera
Datasheet

Specifications of IPSRAMQDRII

Lead Free Status / RoHS Status
Supplier Unconfirmed
Altera Corporation
November 2009
Notes to
(1)
Table 1–4. QDRII SDRAM Maximum Clock Frequency Support in Stratix II & Stratix II GX Devices
This analysis is based on the EP2S90F1020 device. Ensure you perform a timing analysis for your chosen FPGA.
Speed Grade
Table
–3
–4
–5
1–4:
1
Notes to
(1)
Notes to
(1)
Table 1–5. QDRII SRAM Maximum Clock Frequency Supported in Stratix &
Stratix GX Devices (EP1S10 to EP1S40 & EP1SGX10 to EP1SGX40 Devices)
(1)
Table 1–6. QDRII SRAM Maximum Clock Frequency Supported in Stratix
Devices (EP1S60 to EP1S80 Devices)
This analysis is based on the EP1S25F1020 device. Ensure you perform a timing
analysis for your chosen FPGA.
This analysis is based on the EP1S60F1020 device. Ensure you perform a timing
analysis for your chosen FPGA.
DLL-Based Implementation
Table
Table
These numbers apply to both commercial and industrial
devices.
Speed Grade
Speed Grade
MegaCore Version 9.1
1–5:
1–6:
300
200
200
–5
–6
–7
–5
–6
–7
QDRII SRAM Controller MegaCore Function User Guide
Frequency (MHz)
(1)
PLL-Based Implementation
About This MegaCore Function
Frequency (MHz)
Frequency (MHz)
200
167
133
167
167
133
200
167
167
(1)
1–5

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