RPIXP2850BB Intel, RPIXP2850BB Datasheet - Page 30

• Manufacturer Part Number: RPIXP2850BB
• Manufacturer: Intel

Specifications of RPIXP2850BB

• Operating Supply Voltage (typ): 1.3/1.5/2.5/3.3V
• Operating Supply Voltage (max): 1.575/2.7/3.465V
• Operating Supply Voltage (min): 1.235/2.3/3.135V
• Mounting: Surface Mount
• Operating Temperature (max): 70C
• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Not Compliant

IXP28XX Network Processor
Power Ratings and Requirements
2.5
Figure 6.
30
IXP28XX Network Processor Power-On di/dt Profiles
Figure 6
characteristics of this transient event are as follows:
IXP28XX Network Processor di/dt Stimulus
•
•
•
•
•
Reset leakage power is 3.68 W (2.7 A at 1.365 V).
Maximum power is 26.5 W.
After PLL locks the Microengine (1.4/1.0 GHz) the clock starts in 6 cycles as follows:
Remaining clocks are started over 9 cycles as follows:
Power decreases by 13.21 W to 13.28 W, approximately 67 REF_CLK cycles after PLL locks
in one cycle
— Power ramps from leakage to approximately 49% of maximum power, or 12.985 W.
— The di/dt slope for step tr1 (see
— Power ramps remaining rise to maximum power.
— The di/dt slope for step tr2 (see
— Sensitivity analysis shows that a duration of tr2 (see
I_lkg
I
I
illustrates IXP28XX network processor worst case power-up di/dt stimulus. The
over 6 cycles at a 1.4-GHz clock rate (1592 A per µs at VDD
step) over 9 cycles at a 1.4-GHz clock rate (1540 A per µs at VDD
second, or third droop.
4.28 ns
6 tclks
tr1
67 REF_CLK cycles or ~0.67 µs @ 100 MHz
I_mid
Intel
tr2
6.43 ns
®
9 tclks
IXP2800 Network Processor di/dt Stimulus
(B Step Power-Up Condition @ 1.365 V
with Microengine Reset)
Figure
Figure
Icc_max
6) represents a 9.29-W step (i.e., the transient step)
6) represents a 13.515-W step (i.e., the transient
714 ps
1 tclk
tr3
Figure
1. Reset Lkg power = 3.68 W
2. Enable only Microengine clock domain:
3. Start Chassis and divided clock domains:
4. Microengines come out of reset 1 µs
Assumptions:
I_final
after PLL locks and power decreases by
13.21 W to 13.28 W.
Power increase in one cycle (714 ps)
= 49% of total power or 3.68 W to
12.985 W = 9.29 W step.
Remaining delta power increase,
13.515 W, to Icc_max in 9 cycles
or 6.4 ns.
6) does not affect the first,
MAX
Hardware Design Guide
).
t
MAX
).
B3556-01