RPIXP2850BB Intel, RPIXP2850BB Datasheet - Page 84

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RPIXP2850BB

Manufacturer Part Number
RPIXP2850BB
Description
Manufacturer
Intel
Datasheet

Specifications of RPIXP2850BB

Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
IXP28XX Network Processor
QDR SRAM
4.8
Figure 47.
4.8.1
84
IXDP2800 QDR Implementation Guidelines
The following is a list of QDR SRAM routing topologies that have been implemented on the
IXDP2800 Advanced Development Platform:
QDR SRAM Routing Recommendations
Routing for a Four-QDR SRAM Topology
For topologies using four loads during a read, only one SRAM drives the bus, and the stub to the
other SRAM causes a reflection that effectively reduces the data-valid window. The maximum
operating frequency is effectively, approximately 167 MHz.
The following are routing recommendations for four QDR SRAM topologies:
Simulation shows that no termination is required for two-device “clamshell” topology, as
shown in
Performance is at 250+ MHz.
Only terminate lines on IXP28XX network processor drives.
OUTCLK/OUTCLK_L is 4.5 inches.
The x9 devices are recommended for topologies that use four loads, and for 200+ MHz
operations.
The x18 devices are recommended for 167+ MHz operations.
* Note: Loopback clock length is determined from paper analysis. Actual implemented length may vary and
Network Processor
should be determined by performing a detailed timing analysis using extracted layout parasitics.
Intel
Figure
®
Data, Controller,
IXP2800
47.
SRAM Clks
CIN[0]
C[1]
Loopback Clock Length: 7.5"
2.0" - 2.25"
*
0.2" - 0.3"
0.2" - 0.3"
Hardware Design Guide
SRAM1
SRAM2
QDR
QDR
B3418-01

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