EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 158
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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6–10
Table 6–4. Clock Input Pin Connectivity to Regional Clock Networks (Quadrant 2) (Part 2 of 2)
Table 6–5. Clock Input Pin Connectivity to Regional Clock Networks (Quadrant 3)
Stratix III Device Handbook, Volume 1
RCLK50
RCLK51
RCLK52
RCLK53
RCLK22
RCLK23
RCLK24
RCLK25
RCLK26
RCLK27
RCLK28
RCLK29
RCLK30
RCLK31
RCLK32
RCLK33
RCLK34
RCLK35
RCLK36
RCLK37
Clock Resource
Clock Resource
Table 6–5
device Quadrant 3. A given clock input pin can drive two adjacent regional clock
networks to create a dual-regional clock network.
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lists the connectivity between the dedicated clock input pins and RCLKs in
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CLK (p/n Pins)
CLK (p/n Pins)
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Chapter 6: Clock Networks and PLLs in Stratix III Devices
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Clock Networks in Stratix III Devices
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© July 2010 Altera Corporation
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