EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 295
![IC STRATX III FPGA 150K 1152FBGA](/photos/6/72/67293/544-1152-fbga_sml.jpg)
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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© July 2010
SIII51009-1.9
Altera Corporation
Stratix
source-synchronous communication protocols such as Utopia, Rapid I/O
SGMII, SFI, and SPI.
Stratix III devices have the following dedicated circuitry for high-speed differential
I/O support:
■
■
■
■
■
■
■
For high-speed differential interfaces, Stratix III devices support the following
differential I/O standards:
■
■
■
■
■
Differential I/O buffer
Transmitter serializer
Receiver deserializer
Data realignment
Dynamic phase aligner (DPA)
Synchronizer (FIFO buffer)
Analog Phase-Locked Loops (PLLs) (located on left and right sides of the device)
Low voltage differential signaling (LVDS)
Mini-LVDS
Reduced swing differential signaling (RSDS)
High-speed Transceiver Logic (HSTL)
Stub Series Terminated Logic (SSTL)
®
III devices offers up to 1.6-Gbps differential I/O capabilities to support
9. High-Speed Differential I/O Interfaces
and DPA in Stratix III Devices
Stratix III Device Handbook, Volume 1
®
, XSBI,
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