EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 62
EP3SL150F1152C2N
Manufacturer Part Number
EP3SL150F1152C2N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr
Datasheets
1.EP3SL150F780C4N.pdf
(16 pages)
2.EP3SL150F780C4N.pdf
(332 pages)
3.EP3SL150F780C4N.pdf
(456 pages)
Specifications of EP3SL150F1152C2N
Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2409
EP3SL150F1152C2NES
EP3SL150F1152C2NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP3SL150F1152C2N
Manufacturer:
ALTERA
Quantity:
20 000
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2–18
Figure 2–16. ALM in LUT-Register Mode with 3-Register Capability
Register Chain
Stratix III Device Handbook, Volume 1
DC1
E0
E1
F1
F0
clk [2:0]
In addition to the general routing outputs, the ALMs in an LAB have register chain
outputs. The register chain routing allows registers in the same LAB to be cascaded
together. The register chain interconnect allows a LAB to use LUTs for a single
combinational function and the registers to be used for an unrelated shift register
implementation. These resources speed up connections between ALMs while saving
local interconnect resources (refer to
automatically takes advantage of these resources to improve utilization and
performance.
aclr [1:0]
datain
aclr
sclr
latchout
regout
Chapter 2: Logic Array Blocks and Adaptive Logic Modules in Stratix III Devices
reg_chain_in
Figure
reg_chain_out
2–17). The Quartus II Compiler
datain
sdata
datain
sdata
aclr
aclr
regout
regout
© February 2009 Altera Corporation
Adaptive Logic Modules
lelocal 1
leout 1 a
leout 1 b
lelocal 0
leout 0 b
leout 0 a
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