IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 178

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
E1 FRMP Time Slot 0 International / National Bits (038H, 0B8H, 138H, 1B8H, 238H, 2B8H, 338H, 3B8H)
The ‘A’ bit is the Remote Alarm Indication bit. The Sa[4:8] bits are the National bits. Their position is shown in the following table:
Si[1]:
frames.
Si[0]:
NFAS frames.
A:
interrupt on NFAS frames.
Sa[4:8]:
frames.
E1 FRMP CRC Error Counter-LSB (039H, 0B9H, 139H, 1B9H, 239H, 2B9H, 339H, 3B9H)
LSB.
Programming Information
Frame Type
Bit Name
Bit Name
Default
Default
Bit No.
Bit No.
NFAS
Type
Type
The content in this register reflects the International bits, Remote Alarm Indication bit and National bits. The Si[1:0] bits are the International bits.
Note that the contents of this register are not updated while the received data stream is out of Basic Frame.
Directly reflect the content in the International bit in the latest received FAS frame and is updated on the generation of the IFPI interrupt on FAS
Directly reflect the content in the International bit in the latest received NFAS frame and is updated on the generation of the IFPI interrupt on
Directly reflect the content in the Remote Alarm Indication (A) bit in the latest received NFAS frame and is updated on the generation of the IFPI
Directly reflect the content in the National bit in the latest received NFAS frame and is updated on the generation of the IFPI interrupt on NFAS
The CRCERR[7:0], together with the CRCERR[9:8], represent the number of the CRC errors and update every second. The CRCERR[0] is the
FAS
CRCERR[7]
Si[1]
Si[1]
Si[0]
R
X
R
X
7
7
0
CRCERR[6]
Si[0]
R
R
6
X
6
X
1
0
1
CRCERR[5]
A
R
X
R
X
5
A
5
2
0
CRCERR[4]
Sa[4]
Sa[4]
R
X
R
X
4
3
1
4
168
Eight Bits in TS0
CRCERR[3]
Sa[5]
Sa[5]
R
X
R
X
3
4
1
3
CRCERR[2]
Sa[6]
Sa[6]
R
R
2
X
5
0
2
X
T1 / E1 / J1 OCTAL FRAMER
CRCERR[1]
Sa[7]
Sa[7]
R
X
6
1
R
X
1
1
March 5, 2009
CRCERR[0]
Sa[8]
Sa[8]
1
R
X
7
R
X
0
0