IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 6

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
5 PROGRAMMING INFORMATION ................................................................................................................................. 124
6 IEEE STD 1149.1 JTAG TEST ACCESS PORT ........................................................................................................... 268
7 PHYSICAL AND ELECTRICAL SPECIFICATIONS ..................................................................................................... 275
Table of Contents
5.1 REGISTER MAP ......................................................................................................................................................................................... 124
5.2 REGISTER DESCRIPTION ........................................................................................................................................................................ 131
6.1 JTAG INSTRUCTIONS AND INSTRUCTION REGISTER (IR) .................................................................................................................. 269
6.2 JTAG DATA REGISTER ............................................................................................................................................................................ 270
6.3 TEST ACCESS PORT CONTROLLER ...................................................................................................................................................... 272
7.1 ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................ 275
7.2 OPERATING CONDITIONS ....................................................................................................................................................................... 275
7.3 D.C. CHARACTERISTICS ......................................................................................................................................................................... 275
7.4 CLOCK AND RESET TIMING .................................................................................................................................................................... 276
7.5 MICROPROCESSOR READ ACCESS TIMING ........................................................................................................................................ 277
7.6 MICROPROCESSOR WRITE ACCESS TIMING ....................................................................................................................................... 278
7.7 I/O TIMING CHARACTERISTICS .............................................................................................................................................................. 279
ORDERING INFORMATION ......................................................................................................................................... 282
5.1.1
5.1.2
5.2.1
5.2.2
6.2.1
6.2.2
6.2.3
7.4.1
7.4.2
7.7.1
7.7.2
7.7.3
4.2.4.5
E1 Mode Register Map ................................................................................................................................................................. 124
T1/J1 Mode Register Map ............................................................................................................................................................ 127
E1 Mode ........................................................................................................................................................................................ 132
T1/J1 Mode .................................................................................................................................................................................... 207
Device Identification Register (IDR) ........................................................................................................................................... 270
Bypass Register (BYR) ................................................................................................................................................................ 270
Boundary Scan Register (BSR) ................................................................................................................................................... 270
Clock Parameters E1 Configuration ........................................................................................................................................... 276
cLOCK pARAMETERS t1/j1 cONFIGURATION .......................................................................................................................... 276
Transmit System Interface Timing .............................................................................................................................................. 279
Receive System Interface Timing ............................................................................................................................................... 280
Receive & Transmit Line Timing ................................................................................................................................................. 281
7.7.3.1
7.7.3.2
Using TJAT / Timing Option ........................................................................................................................................... 123
Receive Line Interface Timing ........................................................................................................................................ 281
Transmit Line Interface Timing ....................................................................................................................................... 281
iv
T1 / E1 / J1 OCTAL FRAMER
March 5, 2009