IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 35

no-image

IDT82V2108PX

Manufacturer Part Number
IDT82V2108PX
Description
IC FRAMER T1/J1/E1 8CH 128-PQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT82V2108PX

Controller Type
T1/E1/J1 Framer
Interface
Parallel
Voltage - Supply
2.97 V ~ 3.63 V
Current - Supply
160mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Screening Level
Industrial
Mounting
Surface Mount
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
82V2108PX

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT82V2108PX
Manufacturer:
IDT
Quantity:
191
Part Number:
IDT82V2108PX8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82V2108PXG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT82V2108PXG
Manufacturer:
IDT
Quantity:
20 000
Company:
Part Number:
IDT82V2108PXG
Quantity:
604
Part Number:
IDT82V2108PXG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
IDT82V2108
3.8
3.8.1
Buffer is used to synchronize the incoming frames to the Receive Side
System Common Clock derived from the RSCCK pin, and to the
Receive Side System Common Frame Pulse derived from the RSCFS
pin. A write pointer is used to write the data to the Elastic Store Buffer,
while a read pointer is used to read the data from the Elastic Store
Buffer.
that of the Receive Side System Common Clock (RSCCK), the write
pointer will be faster than the read pointer and the Elastic Store Buffer
will be filled. So a frame will be deleted after its prior frame is read.
When the read pointer crosses the frame boundary, a controlled slip will
occur with a logic 1 indicated in the SLIPD (b1, E1-059H).
of RSCCK, the write pointer will be slower than the read pointer and the
Elastic Store Buffer will be empty. The frame will be repeated after it is
read. When the read pointer crosses the next frame boundary, a con-
trolled slip will occur with a logic 0 indicated in the SLIPD (b1, E1-059H).
interrupt on the INT pin will also occur if the SLIPE (b2, E1-059H) is set
to logic 1.
zation, the idle code programmed in the D[7:0] (b7~0, E1-05AH) in the
Elastic Store Buffer can be set to replace the data if the TRKEN (b1, E1-
001H) is set to logic 1.
bypassed unless the device is in the Payload Loopback diagnosis mode.
(Refer to Chapter 3.23.3 Payload Loopback for details).
3.8.2
Buffer is used to synchronize the incoming frames to the Receive Side
System Common Clock derived from the RSCCK pin, and to the
Receive Side System Common Frame Pulse derived from the RSCFS
pin. A write pointer is used to write the data to the Elastic Store Buffer,
while a read pointer is used to read the data from the Elastic Store
Buffer.
that of the Receive Side System Common Clock (RSCCK), the write
pointer will be faster than the read pointer and the Elastic Store Buffer
will be filled. So a frame will be deleted after its prior frame is read.
When the read pointer crosses the frame boundary, a controlled slip will
occur with a logic 1 indicated in the SLIPD (b1, T1/J1-01DH).
of RSCCK, the write pointer will be slower than the read pointer and the
Elastic Store Buffer will be empty. The frame will be repeated after it is
read. When the read pointer crosses the next frame boundary, a con-
trolled slip will occur with a logic 0 indicated in the SLIPD (b1, T1/J1-
01DH).
Functional Description
The Elastic Store Buffer of each framer operates independently.
In Receive Clock Slave mode, a 2-basic-frame depth Elastic Store
When the average frequency of the incoming data is greater than
When the average frequency of the incoming data is less than that
When the slip occurs, the SLIPI (b0, E1-059H) will indicate. An
In Receive Clock Slave mode, if it is out of Basic Frame synchroni-
In Receive Clock Master mode, the Elastic Store Buffer is
In Receive Clock Slave mode, a 2-basic-frame depth Elastic Store
When the average frequency of the incoming data is greater than
When the average frequency of the incoming data is less than that
ELASTIC STORE BUFFER (ELSB)
E1 MODE
T1/J1 MODE
25
interrupt on the INT pin will also occur if the SLIPE (b2, T1/J1-01DH) is
logic 1.
tion, the idle code programmed in the D[7:0] (b7~0, T1/J1-01EH) in the
Elastic Store Buffer will replace the data of all channels automatically.
bypassed unless the device is in the payload loopback diagnosis mode.
(Refer to Chapter 3.23.3 Payload Loopback for details).
When the slip occurs, the SLIPI (b0, T1/J1-01DH) will indicate. An
In Receive Clock Slave mode, if it is out of SF/ESF synchroniza-
In Receive Clock Master mode, the Elastic Store Buffer is
T1 / E1 / J1 OCTAL FRAMER
March 5, 2009

Related parts for IDT82V2108PX