IDT82V2108PX IDT, Integrated Device Technology Inc, IDT82V2108PX Datasheet - Page 237

• Manufacturer Part Number: IDT82V2108PX
• Description: IC FRAMER T1/J1/E1 8CH 128-PQFP
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82V2108PX

• Controller Type: T1/E1/J1 Framer
• Interface: Parallel
• Voltage - Supply: 2.97 V ~ 3.63 V
• Current - Supply: 160mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-MQFP, 128-PQFP
• Screening Level: Industrial
• Mounting: Surface Mount
• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 82V2108PX

IDT82V2108
T1 / J1 FRMP Interrupt Status (022H, 0A2H, 122H, 1A2H, 222H, 2A2H, 322H, 3A2H)
COFAI:
the new alignment pattern differs from the previous one.
FERI:
BEEI:
calculated CRC-6 result is not the same as the received CRC-6 bits) for ESF format.
SFEI:
MFPI:
INFRI:
MFP:
INFR:
Programming Information
Bit Name
Default
Bit No.
Type
= 0: Indicates the framing signal position shift has not occurred.
= 1: Indicates the occurrence of framing signal position shift, which means when the frame alignment pattern has been achieved, the position of
This bit is cleared to ‘0’ after it is read.
= 0: Indicates that there is no framing bit error.
= 1: Indicates the occurrence of a framing bit error.
This bit is cleared to ‘0’ after it is read.
This bit indicates the occurrence of a bit error event. The bit error event is defined as a framing bit error for SF format or a CRC-6 error (the local
= 0: Indicates there is no bit error.
= 1: Indicates the occurrence of a bit error.
(For SF formatted data, this bit has the same function as FERI bit.)
This bit is cleared to ‘0’ after it is read.
The Severe Framing Error is defined as 2 or more framing bit errors during the current super-frame of SF or ESF data.
= 0: Indicates there is no severe framing error.
= 1: Indicates the occurrence of severe framing error.
This bit is cleared to ‘0’ after it is read.
This bit indicates the transition of the status of the current mimic framing pattern.
= 0: When the status of current mimic framing pattern is not changed.
= 1: When there is a transition (exist to non-exist, or non-exist to exist) of the status of mimic framing pattern.
This bit is cleared to ‘0’ after it is read.
This bit indicates the transition of frame synchronization status.
= 0: When the frame synchronization status is not changed.
= 1: When the frame synchronization status of the receiving data stream changes from in-frame to out-of-frame or from out-of-frame to in-frame.
This bit reflects the current status of mimic framing pattern.
= 0: Indicates that the mimic framing pattern does not exist.
= 1: Indicates the presence of more than one framing alignment patterns in the receiving data stream.
Read operation will not change the status of this bit.
This bit reflects the current status of frame synchronization.
COFAI
7
0
R
FERI
R
6
0
BEEI
R
5
0
SFEI
R
4
0
227
MFPI
R
3
0
INFRI
R
2
0
T1 / E1 / J1 OCTAL FRAMER
MFP
R
1
0
March 5, 2009
INFR
R
0
0