ADUC7033BCPZ-8L Analog Devices Inc, ADUC7033BCPZ-8L Datasheet - Page 133

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ADUC7033BCPZ-8L

Manufacturer Part Number
ADUC7033BCPZ-8L
Description
IC MCU FLASH 96K ANLG I/O 48LFCS
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Datasheets

Specifications of ADUC7033BCPZ-8L

Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
48-LFCSP
For Use With
EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
2
1
LHSVAL0 LOADED
INTO LHSCAP HERE
MASTER DRIVES
BSD BUS LOW
BSD ‘0’ PERIOD
Figure 58. Master Read, Slave Transmit
3
4
SOFTWARE ASSERTS
BSD LOW HERE
LHSCMP = LHSVAL0
INTERRUPT GENERATED
HERE
5
SOFTWARE DEASSERTS
BSD HIGH HERE
BSD ‘1’ PERIOD
Rev. B | Page 133 of 140
WAKE-UP FROM BSD INTERFACE
The MCU core can be woken up from power-down via the BSD
physical interface. Before entering power-down mode, user
code should enable the start condition interrupt (LHSCON0[3]).
When this interrupt is enabled, a high to low transition on the
LIN/BSD pin generates an interrupt event and wakes up the
MCU core.
ADuC7033

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