ADUC7033BCPZ-8L Analog Devices Inc, ADUC7033BCPZ-8L Datasheet - Page 81

• Manufacturer Part Number: ADUC7033BCPZ-8L
• Description: IC MCU FLASH 96K ANLG I/O 48LFCS
• Manufacturer: Analog Devices Inc
• Type: Battery Managementr

Specifications of ADUC7033BCPZ-8L

• Input Type: Logic
• Output Type: Logic
• Interface: UART, SPI
• Current - Supply: 20mA
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• For Use With: EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timer1 Capture Register
Name:
Address:
Default Value:
Access:
Function:
Timer1 Control Register
Name:
Address:
Default Value:
Access:
Function:
Table 54. T1CON MMR Bit Designations
Bit
31 to 24
23
22 to 20
19
18
17
16 to 12
11 to 9
8
7
6
T1CAP
0xFFFF0330
0x00000000
Read only
This 32-bit register holds the 32-bit value captured by an enabled IRQ event.
T1CON
0xFFFF0328
0x01000000
Read/write
This 32-bit MMR configures the mode of operation of Timer1.
Description
8-Bit Postscaler.
By writing to these eight bits, a value is written to the postscaler. Writing 0 is interpreted as a 1.
By reading these eight bits, the current value of the counter is read.
Timer1 Enable Postscaler.
Set to enable the Timer1 postscaler. If enabled, interrupts are generated after T1CON[31:24] periods as defined
by T1LD.
Cleared to disable the Timer1 postscaler.
Reserved. These bits are reserved and should be written as 0 by user code.
Postscaler Compare Flag. Read only. Set if the number of Timer1 overflows is equal to the number written to the
postscaler.
Timer1 Interrupt Source.
Set to select interrupt generation from the postscaler counter.
Cleared to select interrupt generation directly from Timer1.
Event Select Bit.
Set by user to enable time capture of an event.
Cleared by user to disable time capture of an event.
Event select range, 0 to 31. The events are described in Table 52.
Clock Select.
000 = core clock (default).
001 = low power 32.768 kHz oscillator.
010 = GPIO_8.
011 = GPIO_5.
Count Up.
Set by user for Timer1 to count up.
Cleared by user for Timer1 to count down (default).
Timer1 Enable Bit.
Set by user to enable Timer1.
Cleared by user to disable Timer1 (default).
Timer1 Mode.
Set by user to operate in periodic mode.
Cleared by user to operate in free running mode (default).
Rev. B | Page 81 of 140
ADuC7033