ADUC7033BCPZ-8L Analog Devices Inc, ADUC7033BCPZ-8L Datasheet - Page 76

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ADUC7033BCPZ-8L

Manufacturer Part Number
ADUC7033BCPZ-8L
Description
IC MCU FLASH 96K ANLG I/O 48LFCS
Manufacturer
Analog Devices Inc
Type
Battery Managementr
Datasheets

Specifications of ADUC7033BCPZ-8L

Input Type
Logic
Output Type
Logic
Interface
UART, SPI
Current - Supply
20mA
Mounting Type
Surface Mount
Package / Case
48-LFCSP
For Use With
EVAL-ADUC7033QSPZ - EVAL DEV QUICK START ADUC7033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC7033
Starting Timer2
When starting Timer2, it is recommended to first load Timer2
with the required TxLD value. Next, start the timer by setting
the T2CON bits as required. This enables the timer but only
once the T2CON bits have been latched internally in the
Timer2 clock domain. Therefore, it is advised that a delay of
more than three clock periods (that is, 100 μs for a 32 kHz timer
clock source) is inserted to allow both the T2LD value and the
Example Code
T2LD = 0x1;
T2CON = 0x02CF;
Delay(100us);
T2CLRI = 0 ;
IRQEN = WAKEUP_TIMER_BIT;
//Reload timer
//Enable T2, low power oscillator, 32768 prescaler
//Include delay to ensure T2CON bits take effect
//*ClearTimerIrq
//Unmask Timer2
Rev. B | Page 76 of 140
T2CON value to be latched through the synchronization logic
and reach the Timer2 domain.
After the delay, it is recommended that any (inadvertent)
Timer2 interrupts are now cleared using T2CLRI = 0x00.
Finally, the Timer2 system interrupt can be unmasked by
setting the appropriate bit in the IRQEN MMR. An example
of this code follows (where it is assumed that Timer2 is halted).

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